From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Sun, 1 Mar 2015 14:28:29 +0100 From: Oleg Nesterov To: "Paul E. McKenney" Cc: Peter Zijlstra , Manfred Spraul , LKML , 1vier1@web.de, Kirill Tkhai , Ingo Molnar , Josh Poimboeuf , stable@vger.kernel.org Subject: Re: [PATCH] ipc/sem.c: Update/correct memory barriers. Message-ID: <20150301132829.GB20691@redhat.com> References: <1425155775-23909-1-git-send-email-manfred@colorfullife.com> <20150228214533.GY5029@twins.programming.kicks-ass.net> <20150228233401.GM15405@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20150228233401.GM15405@linux.vnet.ibm.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: On 02/28, Paul E. McKenney wrote: > > The idea is that this would become a no-op on x86, s390, sparc &c, an isb > instruction on ARM, an isync instruction on Power, and I cannot remember > what on Itanium? The other idea being to provide read-to-read control > ordering in addition to the current read-to-write control ordering? To me, the only purpose is documentation. Let's look at task_work_run() /* * Synchronize with task_work_cancel(). It can't remove * the first entry == work, cmpxchg(task_works) should * fail, but it can play with *work and other entries. */ raw_spin_unlock_wait(&task->pi_lock); smp_mb(); It doesn't need the full mb() too. But rmb() will look very confusing without a fat comment. So I think that it would be nice to write this comment once and put it into the new helper. Oleg.