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Date: Fri, 24 Apr 2015 02:59:06 -0700
From: Andi Kleen <ak@linux.intel.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Ingo Molnar <mingo@redhat.com>,
	"H. Peter Anvin" <hpa@zytor.com>, x86@kernel.org,
	Don Zickus <dzickus@redhat.com>,
	Frederic Weisbecker <fweisbec@gmail.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Anton Blanchard <anton@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH v1] watchdog: Use a reference cycle counter to avoid
 scaling issues
Message-ID: <20150424095906.GL13605@tassilo.jf.intel.com>
References: <1429801408-11309-1-git-send-email-alexander.shishkin@linux.intel.com>
 <alpine.DEB.2.11.1504232153080.13914@nanos>
 <20150423203236.GJ13605@tassilo.jf.intel.com>
 <alpine.DEB.2.11.1504232242510.13914@nanos>
 <20150424005133.GK13605@tassilo.jf.intel.com>
 <alpine.DEB.2.11.1504240957570.13914@nanos>
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> There are better ways to do that than using heuristics. We have to
> deal with 3 variants of the reference counter:
> 
> 1) Core and Atom: counts bus cycles and we know that frequency already
>    	    	  from the local apic calibration
> 
> 2) Nehalem, Westmere: Same as TSC
> 
> 3) Sandybridge and later:  XCLK which is 100MHz
> 
> No magic calibration, just use the information which we have on our
> hands already.

This is a really bad idea. We basically would need to maintain a big
switch with model numbers, with new cases added for every new CPU.
Would be a maintenance nightmare.

-Andi

-- 
ak@linux.intel.com -- Speaking for myself only