From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx3.wp.pl ([212.77.101.9]:9633 "EHLO mx3.wp.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759010AbbFBOhN (ORCPT ); Tue, 2 Jun 2015 10:37:13 -0400 Received: from 89-69-164-220.dynamic.chello.pl (HELO north) (kubakici@[89.69.164.220]) (envelope-sender ) by smtp.wp.pl (WP-SMTPD) with ECDHE-RSA-AES256-GCM-SHA384 encrypted SMTP for ; 2 Jun 2015 16:37:10 +0200 Date: Tue, 2 Jun 2015 16:37:09 +0200 From: Jakub Kicinski To: stable@vger.kernel.org Subject: mmc: sdhci: Fix FSL ESDHC reset handling quirk Message-ID: <20150602163709.71d1460c@north> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: stable-owner@vger.kernel.org List-ID: Please include following patch from Linus' tree in the 3.18 branch. Without it SDHC is unusable on Freescale P2020. Thanks! commit 556b5f33513f16450e8bb803c82a24377b94a34e From: Alessio Igor Bogani Date: Tue, 9 Dec 2014 09:40:38 +0100 mmc: sdhci: Fix FSL ESDHC reset handling quirk The commit 0718e59ae259 ("mmc: sdhci: move FSL ESDHC reset handling quirk into esdhc code") states that Freescale esdhc is the only controller which needs the interrupt registers restored after a reset. So it moves SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET quirk handling code into the esdhc-imx driver only. Unfortunately the same controller is used in other boards which use the of-esdhc driver instead (like powerpc P2020). Restore interrupts after reset in the sdhci-of-esdhc driver also. Signed-off-by: Alessio Igor Bogani Signed-off-by: Ulf Hansson drivers/mmc/host/sdhci-of-esdhc.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)