From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mailapp01.imgtec.com ([195.59.15.196]:55468 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751597AbbIJSDa (ORCPT ); Thu, 10 Sep 2015 14:03:30 -0400 Date: Thu, 10 Sep 2015 11:03:23 -0700 From: Paul Burton To: , CC: Markos Chandras , , , James Hogan , "Ralf Baechle" Subject: Re: [PATCH 6/6] MIPS: CPS: drop .set mips64r2 directives Message-ID: <20150910180323.GA22682@NP-P-BURTON> References: <1438814560-19821-1-git-send-email-paul.burton@imgtec.com> <1438814560-19821-7-git-send-email-paul.burton@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline In-Reply-To: <1438814560-19821-7-git-send-email-paul.burton@imgtec.com> Sender: stable-owner@vger.kernel.org List-ID: Ralf: is there a reason you've only applied patch 1 of this series? v4.2 is broken because these didn't get in (despite being submitted well before the release), and master is still broken because they still haven't gotten in. If there's a reason you didn't merge them please let me know, otherwise please can we get them in ASAP. Thanks, Paul On Wed, Aug 05, 2015 at 03:42:40PM -0700, Paul Burton wrote: > Commit 977e043d5ea1 ("MIPS: kernel: cps-vec: Replace mips32r2 ISA level > with mips64r2") leads to .set mips64r2 directives being present in 32 > bit (ie. CONFIG_32BIT=y) kernels. This is incorrect & leads to MIPS64 > instructions being emitted by the assembler when expanding > pseudo-instructions. For example the "move" instruction can legitimately > be expanded to a "daddu". This causes problems when the kernel is run on > a MIPS32 CPU, as CONFIG_32BIT kernels of course often are... > > Fix this by dropping the .set directives entirely now that Kconfig > should be ensuring that kernels including this code are built with a > suitable -march= compiler flag. > > Signed-off-by: Paul Burton > Cc: Markos Chandras > Cc: # 3.16+ > --- > > arch/mips/kernel/cps-vec.S | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S > index 209ded1..763d8b7 100644 > --- a/arch/mips/kernel/cps-vec.S > +++ b/arch/mips/kernel/cps-vec.S > @@ -229,7 +229,6 @@ LEAF(mips_cps_core_init) > has_mt t0, 3f > > .set push > - .set mips64r2 > .set mt > > /* Only allow 1 TC per VPE to execute... */ > @@ -348,7 +347,6 @@ LEAF(mips_cps_boot_vpes) > nop > > .set push > - .set mips64r2 > .set mt > > 1: /* Enter VPE configuration state */ > -- > 2.5.0 >