Re: FAILED: patch "[PATCH] arm64: kernel: fix tcr_el1.t0sz restore on systems with" failed to apply to 4.1-stable tree

[Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>]

Hi Greg,

On Thu, Nov 05, 2015 at 09:57:12PM -0800, gregkh@linuxfoundation.org wrote:
> 
> The patch below does not apply to the 4.1-stable tree.
> If someone wants it applied there, or to any other stable or longterm
> tree, then please email the backport, including the original git commit
> id to <stable@vger.kernel.org>.

The reason for that is a dependency on commit id:

commit af391b15f7b5 ("arm64: kernel: rename __cpu_suspend to keep it
aligned with arm")

that was not sent to stable since it was not a fix.

I applied the commit above and subsequently the $SUBJECT patch on
top of v4.1, tested the resulting tree and everything is fine, so
if you can apply the dependency above and then this patch I think
we are done, please let me know if that's reasonable and you need
more help.

Thank you very much !
Lorenzo

> 
> thanks,
> 
> greg k-h
> 
> ------------------ original commit in Linus's tree ------------------
> 
> From e13d918a19a7b6cba62b32884f5e336e764c2cc6 Mon Sep 17 00:00:00 2001
> From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Date: Tue, 27 Oct 2015 17:29:10 +0000
> Subject: [PATCH] arm64: kernel: fix tcr_el1.t0sz restore on systems with
>  extended idmap
> 
> Commit dd006da21646 ("arm64: mm: increase VA range of identity map")
> introduced a mechanism to extend the virtual memory map range
> to support arm64 systems with system RAM located at very high offset,
> where the identity mapping used to enable/disable the MMU requires
> additional translation levels to map the physical memory at an equal
> virtual offset.
> 
> The kernel detects at boot time the tcr_el1.t0sz value required by the
> identity mapping and sets-up the tcr_el1.t0sz register field accordingly,
> any time the identity map is required in the kernel (ie when enabling the
> MMU).
> 
> After enabling the MMU, in the cold boot path the kernel resets the
> tcr_el1.t0sz to its default value (ie the actual configuration value for
> the system virtual address space) so that after enabling the MMU the
> memory space translated by ttbr0_el1 is restored as expected.
> 
> Commit dd006da21646 ("arm64: mm: increase VA range of identity map")
> also added code to set-up the tcr_el1.t0sz value when the kernel resumes
> from low-power states with the MMU off through cpu_resume() in order to
> effectively use the identity mapping to enable the MMU but failed to add
> the code required to restore the tcr_el1.t0sz to its default value, when
> the core returns to the kernel with the MMU enabled, so that the kernel
> might end up running with tcr_el1.t0sz value set-up for the identity
> mapping which can be lower than the value required by the actual virtual
> address space, resulting in an erroneous set-up.
> 
> This patchs adds code in the resume path that restores the tcr_el1.t0sz
> default value upon core resume, mirroring this way the cold boot path
> behaviour therefore fixing the issue.
> 
> Cc: <stable@vger.kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Fixes: dd006da21646 ("arm64: mm: increase VA range of identity map")
> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Signed-off-by: James Morse <james.morse@arm.com>
> Signed-off-by: Will Deacon <will.deacon@arm.com>
> 
> diff --git a/arch/arm64/kernel/suspend.c b/arch/arm64/kernel/suspend.c
> index 8297d502217e..44ca4143b013 100644
> --- a/arch/arm64/kernel/suspend.c
> +++ b/arch/arm64/kernel/suspend.c
> @@ -80,17 +80,21 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
>  	if (ret == 0) {
>  		/*
>  		 * We are resuming from reset with TTBR0_EL1 set to the
> -		 * idmap to enable the MMU; restore the active_mm mappings in
> -		 * TTBR0_EL1 unless the active_mm == &init_mm, in which case
> -		 * the thread entered cpu_suspend with TTBR0_EL1 set to
> -		 * reserved TTBR0 page tables and should be restored as such.
> +		 * idmap to enable the MMU; set the TTBR0 to the reserved
> +		 * page tables to prevent speculative TLB allocations, flush
> +		 * the local tlb and set the default tcr_el1.t0sz so that
> +		 * the TTBR0 address space set-up is properly restored.
> +		 * If the current active_mm != &init_mm we entered cpu_suspend
> +		 * with mappings in TTBR0 that must be restored, so we switch
> +		 * them back to complete the address space configuration
> +		 * restoration before returning.
>  		 */
> -		if (mm == &init_mm)
> -			cpu_set_reserved_ttbr0();
> -		else
> -			cpu_switch_mm(mm->pgd, mm);
> -
> +		cpu_set_reserved_ttbr0();
>  		flush_tlb_all();
> +		cpu_set_default_tcr_t0sz();
> +
> +		if (mm != &init_mm)
> +			cpu_switch_mm(mm->pgd, mm);
>  
>  		/*
>  		 * Restore per-cpu offset before any kernel
>