[PATCH v1.0(linux-sti-3.10) SDK2.15_x 3/4] ARM: 8191/1: decompressor: ensure I-side picks up relocated code

[PATCH v1.0(linux-sti-3.10) SDK2.15_x 3/4] ARM: 8191/1: decompressor: ensure I-side picks up relocated code

[Sudeep Biswas]

From: Will Deacon <will.deacon@arm.com>

To speed up decompression, the decompressor sets up a flat, cacheable
mapping of memory. However, when there is insufficient space to hold
the page tables for this mapping, we don't bother to enable the caches
and subsequently skip all the cache maintenance hooks.

Skipping the cache maintenance before jumping to the relocated code
allows the processor to predict the branch and populate the I-cache
with stale data before the relocation loop has completed (since a
bootloader may have SCTLR.I set, which permits normal, cacheable
instruction fetches regardless of SCTLR.M).

This patch moves the cache maintenance check into the maintenance
routines themselves, allowing the v6/v7 versions to invalidate the
I-cache regardless of the MMU state.

Cc: <stable@vger.kernel.org>
Reported-by: Marc Carino <marc.ceeeee@gmail.com>
Tested-by: Julien Grall <julien.grall@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
(cherry picked from commit 238962ac71910d6c20162ea5230685fead1836a4)

Buglink: https://stintbugzilla.st.com/show_bug.cgi?id=89771

Signed-off-by: Sudeep Biswas <sudeep.biswas@st.com>
---
 arch/arm/boot/compressed/head.S |   20 ++++++++++++++++----
 1 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index ee1e1c0..b693562 100755
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -410,8 +410,7 @@ dtb_check_done:
 		add	sp, sp, r6
 #endif
 
-		tst	r4, #1
-		bleq	cache_clean_flush
+		bl	cache_clean_flush
 
 		adr	r0, BSYM(restart)
 		add	r0, r0, r6
@@ -1075,6 +1074,8 @@ cache_clean_flush:
 		b	call_cache_fn
 
 __armv4_mpu_cache_flush:
+		tst	r4, #1
+		movne	pc, lr
 		mov	r2, #1
 		mov	r3, #0
 		mcr	p15, 0, ip, c7, c6, 0	@ invalidate D cache
@@ -1092,6 +1093,8 @@ __armv4_mpu_cache_flush:
 		mov	pc, lr
 		
 __fa526_cache_flush:
+		tst	r4, #1
+		movne	pc, lr
 		mov	r1, #0
 		mcr	p15, 0, r1, c7, c14, 0	@ clean and invalidate D cache
 		mcr	p15, 0, r1, c7, c5, 0	@ flush I cache
@@ -1100,13 +1103,16 @@ __fa526_cache_flush:
 
 __armv6_mmu_cache_flush:
 		mov	r1, #0
-		mcr	p15, 0, r1, c7, c14, 0	@ clean+invalidate D
+		tst	r4, #1
+		mcreq	p15, 0, r1, c7, c14, 0	@ clean+invalidate D
 		mcr	p15, 0, r1, c7, c5, 0	@ invalidate I+BTB
-		mcr	p15, 0, r1, c7, c15, 0	@ clean+invalidate unified
+		mcreq	p15, 0, r1, c7, c15, 0	@ clean+invalidate unified
 		mcr	p15, 0, r1, c7, c10, 4	@ drain WB
 		mov	pc, lr
 
 __armv7_mmu_cache_flush:
+		tst	r4, #1
+		bne	iflush
 		mrc	p15, 0, r10, c0, c1, 5	@ read ID_MMFR1
 		tst	r10, #0xf << 16		@ hierarchical cache (ARMv7)
 		mov	r10, #0
@@ -1167,6 +1173,8 @@ iflush:
 		mov	pc, lr
 
 __armv5tej_mmu_cache_flush:
+		tst	r4, #1
+		movne	pc, lr
 1:		mrc	p15, 0, r15, c7, c14, 3	@ test,clean,invalidate D cache
 		bne	1b
 		mcr	p15, 0, r0, c7, c5, 0	@ flush I cache
@@ -1174,6 +1182,8 @@ __armv5tej_mmu_cache_flush:
 		mov	pc, lr
 
 __armv4_mmu_cache_flush:
+		tst	r4, #1
+		movne	pc, lr
 		mov	r2, #64*1024		@ default: 32K dcache size (*2)
 		mov	r11, #32		@ default: 32 byte line size
 		mrc	p15, 0, r3, c0, c0, 1	@ read cache type
@@ -1207,6 +1217,8 @@ no_cache_id:
 
 __armv3_mmu_cache_flush:
 __armv3_mpu_cache_flush:
+		tst	r4, #1
+		movne	pc, lr
 		mov	r1, #0
 		mcr	p15, 0, r1, c7, c0, 0	@ invalidate whole cache v3
 		mov	pc, lr
-- 
1.7.5.4

Re: [PATCH v1.0(linux-sti-3.10) SDK2.15_x 3/4] ARM: 8191/1: decompressor: ensure I-side picks up relocated code

[Greg KH]

On Tue, Dec 15, 2015 at 08:27:55PM +0530, Sudeep Biswas wrote:
> From: Will Deacon <will.deacon@arm.com>
> 
> To speed up decompression, the decompressor sets up a flat, cacheable
> mapping of memory. However, when there is insufficient space to hold
> the page tables for this mapping, we don't bother to enable the caches
> and subsequently skip all the cache maintenance hooks.
> 
> Skipping the cache maintenance before jumping to the relocated code
> allows the processor to predict the branch and populate the I-cache
> with stale data before the relocation loop has completed (since a
> bootloader may have SCTLR.I set, which permits normal, cacheable
> instruction fetches regardless of SCTLR.M).
> 
> This patch moves the cache maintenance check into the maintenance
> routines themselves, allowing the v6/v7 versions to invalidate the
> I-cache regardless of the MMU state.
> 
> Cc: <stable@vger.kernel.org>
> Reported-by: Marc Carino <marc.ceeeee@gmail.com>
> Tested-by: Julien Grall <julien.grall@linaro.org>
> Signed-off-by: Will Deacon <will.deacon@arm.com>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> (cherry picked from commit 238962ac71910d6c20162ea5230685fead1836a4)
> 
> Buglink: https://stintbugzilla.st.com/show_bug.cgi?id=89771
> 
> Signed-off-by: Sudeep Biswas <sudeep.biswas@st.com>
> ---
>  arch/arm/boot/compressed/head.S |   20 ++++++++++++++++----
>  1 files changed, 16 insertions(+), 4 deletions(-)

I don't understand, this is a very old patch, why are you sending it out
again, and what stable tree do you want it applied to that it is not
already in?

confused,

greg k-h

RE: [PATCH v1.0(linux-sti-3.10) SDK2.15_x 3/4] ARM: 8191/1: decompressor: ensure I-side picks up relocated code

[Sudeep BISWAS DCG]

Hi Greg,

Sorry I missed setting the --suppress-cc option in the git send-email.

BTW, these old patches are cherry-picked to fix some issues we found in our platform (mach-sti) on 3.10 kernel.
We also need few more patches which are new and I will post them soon in proper way on top of latest 4.x kernel.

Sorry to bother you.

Best Regards,
Sudeep
 

>-----Original Message-----
>From: Greg KH [mailto:gregkh@linuxfoundation.org]
>Sent: Tuesday, December 15, 2015 10:32 PM
>To: Sudeep BISWAS DCG
>Cc: DCG_UPD_stlinux_kernel; Will Deacon; stable@vger.kernel.org; Russell
>King
>Subject: Re: [PATCH v1.0(linux-sti-3.10) SDK2.15_x 3/4] ARM: 8191/1:
>decompressor: ensure I-side picks up relocated code
>
>On Tue, Dec 15, 2015 at 08:27:55PM +0530, Sudeep Biswas wrote:
>> From: Will Deacon <will.deacon@arm.com>
>>
>> To speed up decompression, the decompressor sets up a flat, cacheable
>> mapping of memory. However, when there is insufficient space to hold
>> the page tables for this mapping, we don't bother to enable the caches
>> and subsequently skip all the cache maintenance hooks.
>>
>> Skipping the cache maintenance before jumping to the relocated code
>> allows the processor to predict the branch and populate the I-cache
>> with stale data before the relocation loop has completed (since a
>> bootloader may have SCTLR.I set, which permits normal, cacheable
>> instruction fetches regardless of SCTLR.M).
>>
>> This patch moves the cache maintenance check into the maintenance
>> routines themselves, allowing the v6/v7 versions to invalidate the
>> I-cache regardless of the MMU state.
>>
>> Cc: <stable@vger.kernel.org>
>> Reported-by: Marc Carino <marc.ceeeee@gmail.com>
>> Tested-by: Julien Grall <julien.grall@linaro.org>
>> Signed-off-by: Will Deacon <will.deacon@arm.com>
>> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
>> (cherry picked from commit 238962ac71910d6c20162ea5230685fead1836a4)
>>
>> Buglink: https://stintbugzilla.st.com/show_bug.cgi?id=89771
>>
>> Signed-off-by: Sudeep Biswas <sudeep.biswas@st.com>
>> ---
>>  arch/arm/boot/compressed/head.S |   20 ++++++++++++++++----
>>  1 files changed, 16 insertions(+), 4 deletions(-)
>
>I don't understand, this is a very old patch, why are you sending it out
>again, and what stable tree do you want it applied to that it is not
>already in?
>
>confused,
>
>greg k-h