From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com ([192.55.52.93]:61892 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753451AbcAGMwb (ORCPT ); Thu, 7 Jan 2016 07:52:31 -0500 Date: Thu, 7 Jan 2016 14:52:26 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Daniel Vetter Cc: DRI Development , Intel Graphics Development , Patrik Jakobsson , Imre Deak , Jani Nikula , Meelis Roos , Chris Wilson , stable@vger.kernel.org, Daniel Vetter Subject: Re: [PATCH] drm/i915: Init power domains early in driver load Message-ID: <20160107125226.GA4437@intel.com> References: <1452157856-27360-1-git-send-email-daniel.vetter@ffwll.ch> <1452167061-27252-1-git-send-email-daniel.vetter@ffwll.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1452167061-27252-1-git-send-email-daniel.vetter@ffwll.ch> Sender: stable-owner@vger.kernel.org List-ID: On Thu, Jan 07, 2016 at 12:44:21PM +0100, Daniel Vetter wrote: > Since > > commit ac9b8236551d1177fd07b56aef9b565d1864420d > Author: Ville Syrj�l� > Date: Fri Nov 27 18:55:26 2015 +0200 > > drm/i915: Introduce a gmbus power domain > > gmbus also needs the power domain infrastructure right from the start, > since as soon as we register the i2c controllers someone can use them. > > v2: Adjust cleanup paths too (Chris). > > Cc: Ville Syrj�l� > Cc: Patrik Jakobsson > Cc: Imre Deak > Cc: Jani Nikula > Cc: Meelis Roos > Cc: Chris Wilson > Fixes: ac9b8236551d ("drm/i915: Introduce a gmbus power domain") > Cc: stable@vger.kernel.org > References: http://www.spinics.net/lists/intel-gfx/msg83075.html > Tested-by: Meelis Roos > Signed-off-by: Daniel Vetter > --- > drivers/gpu/drm/i915/i915_dma.c | 11 +++++------ > 1 file changed, 5 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c > index 988a3806512a..490d8b0d931e 100644 > --- a/drivers/gpu/drm/i915/i915_dma.c > +++ b/drivers/gpu/drm/i915/i915_dma.c > @@ -398,7 +398,6 @@ static int i915_load_modeset_init(struct drm_device *dev) > if (ret) > goto cleanup_vga_switcheroo; > > - intel_power_domains_init_hw(dev_priv, false); > > intel_csr_ucode_init(dev_priv); > > @@ -1025,6 +1024,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) > > intel_irq_init(dev_priv); > intel_uncore_sanitize(dev); > + intel_power_domains_init(dev_priv); > + intel_power_domains_init_hw(dev_priv); I think intel_init_dpio() needs to be moved too. We need to know the DPIO IOSF ports before attempting to talk to the PHY (which can happen from intel_power_domains_init_hw()). I'm also wondering why we're doing gmbus init this early. We shouldn't need it until modeset init. > > /* Try to make sure MCHBAR is enabled before poking at it */ > intel_setup_mchbar(dev); > @@ -1057,12 +1058,10 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) > goto out_gem_unload; > } > > - intel_power_domains_init(dev_priv); > - > ret = i915_load_modeset_init(dev); > if (ret < 0) { > DRM_ERROR("failed to init modeset\n"); > - goto out_power_well; > + goto out_vblank; > } > > /* > @@ -1091,8 +1090,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) > > return 0; > > -out_power_well: > - intel_power_domains_fini(dev_priv); > +out_vblank: > drm_vblank_cleanup(dev); > out_gem_unload: > WARN_ON(unregister_oom_notifier(&dev_priv->mm.oom_notifier)); > @@ -1103,6 +1101,7 @@ out_gem_unload: > > intel_teardown_gmbus(dev); > intel_teardown_mchbar(dev); > + intel_power_domains_fini(dev_priv); > pm_qos_remove_request(&dev_priv->pm_qos); > destroy_workqueue(dev_priv->gpu_error.hangcheck_wq); > out_freedpwq: > -- > 2.6.4 -- Ville Syrj�l� Intel OTC