stable.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>,
	intel-gfx@lists.freedesktop.org,
	Shashank Sharma <shashank.sharma@intel.com>,
	Sonika Jindal <sonika.jindal@intel.com>,
	Daniel Vetter <daniel.vetter@ffwll.ch>,
	Nick Bowler <nbowler@draconx.ca>,
	stable@vger.kernel.org
Subject: Re: [PATCH] drm/i915: Fix hpd live status bits for g4x
Date: Mon, 15 Feb 2016 19:13:51 +0200	[thread overview]
Message-ID: <20160215171351.GX23290@intel.com> (raw)
In-Reply-To: <87vb5uqwa4.fsf@intel.com>

On Fri, Feb 12, 2016 at 08:26:27AM +0200, Jani Nikula wrote:
> On Thu, 11 Feb 2016, Daniel Vetter <daniel@ffwll.ch> wrote:
> > On Wed, Feb 10, 2016 at 07:59:05PM +0200, ville.syrjala@linux.intel.com wrote:
> >> From: Ville Syrj�l� <ville.syrjala@linux.intel.com>
> >> 
> >> Looks like g4x hpd live status bits actually agree with the spec. At
> >> least they do on the machine I have, and apparently on Nick Bowler's
> >> g4x as well.
> >> 
> >> So gm45 may be the only platform where they don't agree. At least
> >> that seems to be the case based on the (somewhat incomplete)
> >> logs/dumps in [1], and Daniel has also tested this on his gm45
> >> sometime in the past.
> >> 
> >> So let's change the bits to match the spec on g4x. That actually makes
> >> the g4x bits identical to vlv/chv so we can just share the code
> >> between those platforms, leaving gm45 as the special case.
> >> 
> >> [1] https://bugzilla.kernel.org/show_bug.cgi?id=52361
> >> 
> >> Cc: Shashank Sharma <shashank.sharma@intel.com>
> >> Cc: Sonika Jindal <sonika.jindal@intel.com>
> >> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> >> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> >> Cc: Nick Bowler <nbowler@draconx.ca>
> >> References: https://lists.freedesktop.org/archives/dri-devel/2016-February/100382.html
> >> Reported-by: Nick Bowler <nbowler@draconx.ca>
> >> Cc: stable@vger.kernel.org
> >> Fixes: 237ed86c693d ("drm/i915: Check live status before reading edid")
> >> Signed-off-by: Ville Syrj�l� <ville.syrjala@linux.intel.com>
> >
> > Yeah I'm hopeful this will work. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> >
> > Since CI is down and this is super restricted impact and fixing a
> > regression I'm voting that we'll pick it up right away. Jani, are you ok
> > with that?
> 
> Ack.

"Right away" was slightly dealyed by my lazyness.
Anyway, pushed this to dinq. Thanks for the review.

> 
> > -Daniel
> >
> >> ---
> >>  drivers/gpu/drm/i915/i915_reg.h | 15 ++++++++-------
> >>  drivers/gpu/drm/i915/intel_dp.c | 14 +++++++-------
> >>  2 files changed, 15 insertions(+), 14 deletions(-)
> >> 
> >> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> >> index 188ad5de020f..678faa957e75 100644
> >> --- a/drivers/gpu/drm/i915/i915_reg.h
> >> +++ b/drivers/gpu/drm/i915/i915_reg.h
> >> @@ -3296,19 +3296,20 @@ enum skl_disp_power_wells {
> >>  
> >>  #define PORT_HOTPLUG_STAT	_MMIO(dev_priv->info.display_mmio_offset + 0x61114)
> >>  /*
> >> - * HDMI/DP bits are gen4+
> >> + * HDMI/DP bits are g4x+
> >>   *
> >>   * WARNING: Bspec for hpd status bits on gen4 seems to be completely confused.
> >>   * Please check the detailed lore in the commit message for for experimental
> >>   * evidence.
> >>   */
> >> -#define   PORTD_HOTPLUG_LIVE_STATUS_G4X		(1 << 29)
> >> +/* Bspec says GM45 should match G4X/VLV/CHV, but reality disagrees */
> >> +#define   PORTD_HOTPLUG_LIVE_STATUS_GM45	(1 << 29)
> >> +#define   PORTC_HOTPLUG_LIVE_STATUS_GM45	(1 << 28)
> >> +#define   PORTB_HOTPLUG_LIVE_STATUS_GM45	(1 << 27)
> >> +/* G4X/VLV/CHV DP/HDMI bits again match Bspec */
> >> +#define   PORTD_HOTPLUG_LIVE_STATUS_G4X		(1 << 27)
> >>  #define   PORTC_HOTPLUG_LIVE_STATUS_G4X		(1 << 28)
> >> -#define   PORTB_HOTPLUG_LIVE_STATUS_G4X		(1 << 27)
> >> -/* VLV DP/HDMI bits again match Bspec */
> >> -#define   PORTD_HOTPLUG_LIVE_STATUS_VLV		(1 << 27)
> >> -#define   PORTC_HOTPLUG_LIVE_STATUS_VLV		(1 << 28)
> >> -#define   PORTB_HOTPLUG_LIVE_STATUS_VLV		(1 << 29)
> >> +#define   PORTB_HOTPLUG_LIVE_STATUS_G4X		(1 << 29)
> >>  #define   PORTD_HOTPLUG_INT_STATUS		(3 << 21)
> >>  #define   PORTD_HOTPLUG_INT_LONG_PULSE		(2 << 21)
> >>  #define   PORTD_HOTPLUG_INT_SHORT_PULSE		(1 << 21)
> >> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> >> index a073f04a5330..bbe18996efe6 100644
> >> --- a/drivers/gpu/drm/i915/intel_dp.c
> >> +++ b/drivers/gpu/drm/i915/intel_dp.c
> >> @@ -4490,20 +4490,20 @@ static bool g4x_digital_port_connected(struct drm_i915_private *dev_priv,
> >>  	return I915_READ(PORT_HOTPLUG_STAT) & bit;
> >>  }
> >>  
> >> -static bool vlv_digital_port_connected(struct drm_i915_private *dev_priv,
> >> -				       struct intel_digital_port *port)
> >> +static bool gm45_digital_port_connected(struct drm_i915_private *dev_priv,
> >> +					struct intel_digital_port *port)
> >>  {
> >>  	u32 bit;
> >>  
> >>  	switch (port->port) {
> >>  	case PORT_B:
> >> -		bit = PORTB_HOTPLUG_LIVE_STATUS_VLV;
> >> +		bit = PORTB_HOTPLUG_LIVE_STATUS_GM45;
> >>  		break;
> >>  	case PORT_C:
> >> -		bit = PORTC_HOTPLUG_LIVE_STATUS_VLV;
> >> +		bit = PORTC_HOTPLUG_LIVE_STATUS_GM45;
> >>  		break;
> >>  	case PORT_D:
> >> -		bit = PORTD_HOTPLUG_LIVE_STATUS_VLV;
> >> +		bit = PORTD_HOTPLUG_LIVE_STATUS_GM45;
> >>  		break;
> >>  	default:
> >>  		MISSING_CASE(port->port);
> >> @@ -4555,8 +4555,8 @@ bool intel_digital_port_connected(struct drm_i915_private *dev_priv,
> >>  		return cpt_digital_port_connected(dev_priv, port);
> >>  	else if (IS_BROXTON(dev_priv))
> >>  		return bxt_digital_port_connected(dev_priv, port);
> >> -	else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> >> -		return vlv_digital_port_connected(dev_priv, port);
> >> +	else if (IS_GM45(dev_priv))
> >> +		return gm45_digital_port_connected(dev_priv, port);
> >>  	else
> >>  		return g4x_digital_port_connected(dev_priv, port);
> >>  }
> >> -- 
> >> 2.4.10
> >> 
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center

-- 
Ville Syrj�l�
Intel OTC

      reply	other threads:[~2016-02-15 17:13 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-10 17:59 [PATCH] drm/i915: Fix hpd live status bits for g4x ville.syrjala
2016-02-11 10:03 ` Daniel Vetter
2016-02-12  6:26   ` Jani Nikula
2016-02-15 17:13     ` Ville Syrjälä [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20160215171351.GX23290@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=daniel.vetter@ffwll.ch \
    --cc=daniel@ffwll.ch \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@linux.intel.com \
    --cc=nbowler@draconx.ca \
    --cc=shashank.sharma@intel.com \
    --cc=sonika.jindal@intel.com \
    --cc=stable@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).