[PATCH 0/4] MIPS: MSA fixes

[PATCH 0/4] MIPS: MSA fixes

[James Hogan]

Here are some miscellaneous fixes for MSA (MIPS SIMD Architecture)
support:
1) Fix MSA build with recent toolchains
2) Fix 32-bit pointer additions on 64-bit with non-MSA capable
   toolchain.
3) Fix MSA + 64-bit + lockdep build due to large immediate offsets
4) Fix some MSA assembler warnings due to missing .set fp=64

James Hogan (3):
  MIPS: Fix MSA ld_*/st_* asm macros to use PTR_ADDU
  MIPS: Fix MSA assembly with big thread offsets
  MIPS: Fix MSA assembly warnings

Paul Burton (1):
  MIPS: Use copy_s.fmt rather than copy_u.fmt

 arch/mips/include/asm/asmmacro.h | 193 ++++++++++++++++++++++-----------------
 arch/mips/kernel/r4k_fpu.S       |  10 +-
 2 files changed, 113 insertions(+), 90 deletions(-)

Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org>
-- 
2.4.10

[PATCH 1/4] MIPS: Use copy_s.fmt rather than copy_u.fmt

[James Hogan]

From: Paul Burton <paul.burton@imgtec.com>

In revision 1.12 of the MSA specification, the copy_u.w instruction has
been removed for MIPS32 & the copy_u.d instruction has been removed for
MIPS64. Newer toolchains (eg. Codescape SDK essentials 2015.10) will
complain about this like so:

arch/mips/kernel/r4k_fpu.S:290: Error: opcode not supported on this
processor: mips32r2 (mips32r2) `copy_u.w $1,$w26[3]'

Since we always copy to the width of a GPR, simply use copy_s instead of
copy_u to fix this.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 4.1.x-
---
 arch/mips/include/asm/asmmacro.h | 24 ++++++++++++------------
 arch/mips/kernel/r4k_fpu.S       | 10 +++++-----
 2 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index 867f924b05c7..b99b38862fcb 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -298,21 +298,21 @@
 	.set	pop
 	.endm
 
-	.macro	copy_u_w	ws, n
+	.macro	copy_s_w	ws, n
 	.set	push
 	.set	mips32r2
 	.set	fp=64
 	.set	msa
-	copy_u.w $1, $w\ws[\n]
+	copy_s.w $1, $w\ws[\n]
 	.set	pop
 	.endm
 
-	.macro	copy_u_d	ws, n
+	.macro	copy_s_d	ws, n
 	.set	push
 	.set	mips64r2
 	.set	fp=64
 	.set	msa
-	copy_u.d $1, $w\ws[\n]
+	copy_s.d $1, $w\ws[\n]
 	.set	pop
 	.endm
 
@@ -346,8 +346,8 @@
 #define STH_MSA_INSN		0x5800081f
 #define STW_MSA_INSN		0x5800082f
 #define STD_MSA_INSN		0x5800083f
-#define COPY_UW_MSA_INSN	0x58f00056
-#define COPY_UD_MSA_INSN	0x58f80056
+#define COPY_SW_MSA_INSN	0x58b00056
+#define COPY_SD_MSA_INSN	0x58b80056
 #define INSERT_W_MSA_INSN	0x59300816
 #define INSERT_D_MSA_INSN	0x59380816
 #else
@@ -361,8 +361,8 @@
 #define STH_MSA_INSN		0x78000825
 #define STW_MSA_INSN		0x78000826
 #define STD_MSA_INSN		0x78000827
-#define COPY_UW_MSA_INSN	0x78f00059
-#define COPY_UD_MSA_INSN	0x78f80059
+#define COPY_SW_MSA_INSN	0x78b00059
+#define COPY_SD_MSA_INSN	0x78b80059
 #define INSERT_W_MSA_INSN	0x79300819
 #define INSERT_D_MSA_INSN	0x79380819
 #endif
@@ -461,21 +461,21 @@
 	.set	pop
 	.endm
 
-	.macro	copy_u_w	ws, n
+	.macro	copy_s_w	ws, n
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
 	.insn
-	.word	COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11)
+	.word	COPY_SW_MSA_INSN | (\n << 16) | (\ws << 11)
 	.set	pop
 	.endm
 
-	.macro	copy_u_d	ws, n
+	.macro	copy_s_d	ws, n
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
 	.insn
-	.word	COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11)
+	.word	COPY_SD_MSA_INSN | (\n << 16) | (\ws << 11)
 	.set	pop
 	.endm
 
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 17732f876eff..56d86b09c917 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -244,17 +244,17 @@ LEAF(\name)
 	.set	push
 	.set	noat
 #ifdef CONFIG_64BIT
-	copy_u_d \wr, 1
+	copy_s_d \wr, 1
 	EX sd	$1, \off(\base)
 #elif defined(CONFIG_CPU_LITTLE_ENDIAN)
-	copy_u_w \wr, 2
+	copy_s_w \wr, 2
 	EX sw	$1, \off(\base)
-	copy_u_w \wr, 3
+	copy_s_w \wr, 3
 	EX sw	$1, (\off+4)(\base)
 #else /* CONFIG_CPU_BIG_ENDIAN */
-	copy_u_w \wr, 2
+	copy_s_w \wr, 2
 	EX sw	$1, (\off+4)(\base)
-	copy_u_w \wr, 3
+	copy_s_w \wr, 3
 	EX sw	$1, \off(\base)
 #endif
 	.set	pop
-- 
2.4.10

[PATCH 2/4] MIPS: Fix MSA ld_*/st_* asm macros to use PTR_ADDU

[James Hogan]

The MSA ld_*/st_* assembler macros for when the toolchain doesn't
support MSA use addu to offset the base address. However it is a virtual
memory pointer so fix it to use PTR_ADDU which expands to daddu for
64-bit kernels.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 4.3.y-
---
 arch/mips/include/asm/asmmacro.h | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index b99b38862fcb..e689b894353c 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -393,7 +393,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	LDB_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
@@ -402,7 +402,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	LDH_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
@@ -411,7 +411,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	LDW_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
@@ -420,7 +420,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	LDD_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
@@ -429,7 +429,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	STB_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
@@ -438,7 +438,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	STH_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
@@ -447,7 +447,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	STW_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
@@ -456,7 +456,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	STD_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
-- 
2.4.10

Re: [PATCH 1/4] MIPS: Use copy_s.fmt rather than copy_u.fmt

[Ralf Baechle]

On Fri, Apr 15, 2016 at 10:07:23AM +0100, James Hogan wrote:

> From: Paul Burton <paul.burton@imgtec.com>
> 
> In revision 1.12 of the MSA specification, the copy_u.w instruction has
> been removed for MIPS32 & the copy_u.d instruction has been removed for
> MIPS64. Newer toolchains (eg. Codescape SDK essentials 2015.10) will
> complain about this like so:
> 
> arch/mips/kernel/r4k_fpu.S:290: Error: opcode not supported on this
> processor: mips32r2 (mips32r2) `copy_u.w $1,$w26[3]'
> 
> Since we always copy to the width of a GPR, simply use copy_s instead of
> copy_u to fix this.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Signed-off-by: James Hogan <james.hogan@imgtec.com>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: linux-mips@linux-mips.org
> Cc: <stable@vger.kernel.org> # 4.1.x-

Looking good but seems to apply only to 4.3+

  Ralf

Re: [PATCH 0/4] MIPS: MSA fixes

[Ralf Baechle]

On Fri, Apr 15, 2016 at 10:07:22AM +0100, James Hogan wrote:

> Here are some miscellaneous fixes for MSA (MIPS SIMD Architecture)
> support:
> 1) Fix MSA build with recent toolchains
> 2) Fix 32-bit pointer additions on 64-bit with non-MSA capable
>    toolchain.
> 3) Fix MSA + 64-bit + lockdep build due to large immediate offsets
> 4) Fix some MSA assembler warnings due to missing .set fp=64
> 
> James Hogan (3):
>   MIPS: Fix MSA ld_*/st_* asm macros to use PTR_ADDU
>   MIPS: Fix MSA assembly with big thread offsets
>   MIPS: Fix MSA assembly warnings
> 
> Paul Burton (1):
>   MIPS: Use copy_s.fmt rather than copy_u.fmt

Thanks, whole series applied.

  Ralf

Re: [PATCH 1/4] MIPS: Use copy_s.fmt rather than copy_u.fmt

[James Hogan]

[-- Attachment #1: Type: text/plain, Size: 1284 bytes --]

On Fri, Apr 15, 2016 at 11:59:41AM +0200, Ralf Baechle wrote:
> On Fri, Apr 15, 2016 at 10:07:23AM +0100, James Hogan wrote:
> 
> > From: Paul Burton <paul.burton@imgtec.com>
> > 
> > In revision 1.12 of the MSA specification, the copy_u.w instruction has
> > been removed for MIPS32 & the copy_u.d instruction has been removed for
> > MIPS64. Newer toolchains (eg. Codescape SDK essentials 2015.10) will
> > complain about this like so:
> > 
> > arch/mips/kernel/r4k_fpu.S:290: Error: opcode not supported on this
> > processor: mips32r2 (mips32r2) `copy_u.w $1,$w26[3]'
> > 
> > Since we always copy to the width of a GPR, simply use copy_s instead of
> > copy_u to fix this.
> > 
> > Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> > Signed-off-by: James Hogan <james.hogan@imgtec.com>
> > Cc: Ralf Baechle <ralf@linux-mips.org>
> > Cc: linux-mips@linux-mips.org
> > Cc: <stable@vger.kernel.org> # 4.1.x-
> 
> Looking good but seems to apply only to 4.3+
> 
>   Ralf

Yes, sorry. Without bf82cb30c7e58b3a9742f0a45962ebdf51befac7 I figured
the changes in r4k_fpu.S can be easily skipped, but actually I should
have looked deeper as the macros aren't even used until that commit.

Could you change the stable tag to 4.3 please.

Thanks!
James

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 819 bytes --]

Re: [PATCH 1/4] MIPS: Use copy_s.fmt rather than copy_u.fmt

[Ralf Baechle]

On Fri, Apr 15, 2016 at 11:15:36AM +0100, James Hogan wrote:

> Could you change the stable tag to 4.3 please.

Done but will push the new tree in an hour or two not to disturb buildbot
which doesn't like rapid pushed.

  Ralf