From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f45.google.com ([74.125.82.45]:37947 "EHLO mail-wm0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754302AbcDYLl3 (ORCPT ); Mon, 25 Apr 2016 07:41:29 -0400 Received: by mail-wm0-f45.google.com with SMTP id u206so122503105wme.1 for ; Mon, 25 Apr 2016 04:41:28 -0700 (PDT) Date: Mon, 25 Apr 2016 12:41:28 +0100 From: Lee Jones To: Andy Shevchenko Cc: linux-kernel@vger.kernel.org, Heikki Krogerus , stable@vger.kernel.org, #@black.fi.intel.com, v4.3+@black.fi.intel.com Subject: Re: [PATCH v4 1/1] mfd: intel-lpss: save register context on suspend Message-ID: <20160425114128.GE2713@dell> References: <1460981696-38711-1-git-send-email-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1460981696-38711-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: stable-owner@vger.kernel.org List-ID: On Mon, 18 Apr 2016, Andy Shevchenko wrote: > From: Heikki Krogerus > > All configurations are lost and the registers will have > default values when the hardware is suspended and resumed, > so saving the private register space context on suspend, and > restoring it on resume. > > Fixes: 4b45efe85263 (mfd: Add support for Intel Sunrisepoint LPSS devices) > Cc: stable@vger.kernel.org # v4.3+ > Signed-off-by: Heikki Krogerus > --- You're missing a changelog. I had to go and look at previous submissions to catch up on the history. Please make sure you provide changelogs for >v1 submissions. > drivers/mfd/intel-lpss.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) Applied, thanks. > diff --git a/drivers/mfd/intel-lpss.c b/drivers/mfd/intel-lpss.c > index 1bbbe87..807a3e3 100644 > --- a/drivers/mfd/intel-lpss.c > +++ b/drivers/mfd/intel-lpss.c > @@ -34,6 +34,7 @@ > #define LPSS_DEV_SIZE 0x200 > #define LPSS_PRIV_OFFSET 0x200 > #define LPSS_PRIV_SIZE 0x100 > +#define LPSS_PRIV_REG_COUNT (LPSS_PRIV_SIZE / 4) > #define LPSS_IDMA64_OFFSET 0x800 > #define LPSS_IDMA64_SIZE 0x800 > > @@ -76,6 +77,7 @@ struct intel_lpss { > struct mfd_cell *cell; > struct device *dev; > void __iomem *priv; > + u32 priv_ctx[LPSS_PRIV_REG_COUNT]; > int devid; > u32 caps; > u32 active_ltr; > @@ -493,6 +495,16 @@ EXPORT_SYMBOL_GPL(intel_lpss_prepare); > > int intel_lpss_suspend(struct device *dev) > { > + struct intel_lpss *lpss = dev_get_drvdata(dev); > + unsigned int i; > + > + /* Save device context */ > + for (i = 0; i < LPSS_PRIV_REG_COUNT; i++) > + lpss->priv_ctx[i] = readl(lpss->priv + i * 4); > + > + /* Put the device into reset state */ > + writel(0, lpss->priv + LPSS_PRIV_RESETS); > + > return 0; > } > EXPORT_SYMBOL_GPL(intel_lpss_suspend); > @@ -500,8 +512,13 @@ EXPORT_SYMBOL_GPL(intel_lpss_suspend); > int intel_lpss_resume(struct device *dev) > { > struct intel_lpss *lpss = dev_get_drvdata(dev); > + unsigned int i; > > - intel_lpss_init_dev(lpss); > + intel_lpss_deassert_reset(lpss); > + > + /* Restore device context */ > + for (i = 0; i < LPSS_PRIV_REG_COUNT; i++) > + writel(lpss->priv_ctx[i], lpss->priv + i * 4); > > return 0; > } -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog