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* [PATCH] drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time
@ 2016-11-29 14:13 ville.syrjala
  2016-11-29 14:40 ` [Intel-gfx] " Matthew Auld
  0 siblings, 1 reply; 3+ messages in thread
From: ville.syrjala @ 2016-11-29 14:13 UTC (permalink / raw)
  To: intel-gfx; +Cc: stable, Matthew Auld

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Looks like we're only initializing dev_priv->atomic_cdclk_freq
at resume and commit times, not at init time. Let's do that as
well.

We're now hitting the 'WARN_ON(intel_state->cdclk == 0)' in
hsw_compute_linetime_wm() on account of populating
intel_state->cdclk from dev_priv->atomic_cdclk_freq.
Previously we were mispopulating intel_state->cdclk with
dev_priv->cdclk_freq which always had a proper value at init
time and hence the WARN_ON() didn't trigger.

Cc: stable@vger.kernel.org
Cc: Matthew Auld <matthew.auld@intel.com>
Reported-by: Matthew Auld <matthew.auld@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98902
Fixes: e0ca7a6be38c ("drm/i915: Fix cdclk vs. dev_cdclk mess when not recomputing things")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 17a6b59f6678..8ce536a767ad 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -16516,6 +16516,7 @@ int intel_modeset_init(struct drm_device *dev)
 
 	intel_update_czclk(dev_priv);
 	intel_update_cdclk(dev_priv);
+	dev_priv->atomic_cdclk_freq = dev_priv->cdclk_freq;
 
 	intel_shared_dpll_init(dev);
 
-- 
2.7.4


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Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2016-11-29 14:13 [PATCH] drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time ville.syrjala
2016-11-29 14:40 ` [Intel-gfx] " Matthew Auld
2016-11-29 19:36   ` Ville Syrjälä

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