Re: [PATCH 02/18] drm/i915/dsi: Fix chv_exec_gpio disabling the GPIOs it is setting

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Thu, Dec 01, 2016 at 09:29:09PM +0100, Hans de Goede wrote:
> Set the CHV_GPIO_GPIOEN bit when updating GPIOs from chv_exec_gpio.
> 
> Fixes: a0a6d4ffd2ad ("drm/i915/dsi: add support for gpio elements on CHV")
> Cc: stable@vger.kernel.org
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Ville Syrj�l� <ville.syrjala@linux.intel.com>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> Reviewed-by: Ville Syrj�l� <ville.syrjala@linux.intel.com>

Pushed to dinq. Thanks for the patch.

> ---
>  drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index 579d2f5..47cd1b2 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> @@ -300,7 +300,8 @@ static void chv_exec_gpio(struct drm_i915_private *dev_priv,
>  	mutex_lock(&dev_priv->sb_lock);
>  	vlv_iosf_sb_write(dev_priv, port, cfg1, 0);
>  	vlv_iosf_sb_write(dev_priv, port, cfg0,
> -			  CHV_GPIO_GPIOCFG_GPO | CHV_GPIO_GPIOTXSTATE(value));
> +			  CHV_GPIO_GPIOEN | CHV_GPIO_GPIOCFG_GPO |
> +			  CHV_GPIO_GPIOTXSTATE(value));
>  	mutex_unlock(&dev_priv->sb_lock);
>  }
>  
> -- 
> 2.9.3

-- 
Ville Syrj�l�
Intel OTC