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From: Leo Yan <leo.yan@linaro.org>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Marc Zyngier <marc.zyngier@arm.com>,
	John Stultz <john.stultz@linaro.org>,
	Dmitry Shmidt <dimitrysh@google.com>,
	stable@vger.kernel.org
Subject: Re: [PATCH] arm64: arch_timer: Workaround for Cortex-A73 erratum 858921
Date: Wed, 30 Aug 2017 13:02:55 +0800	[thread overview]
Message-ID: <20170830050255.GA30489@leoy-ThinkPad-T440> (raw)
In-Reply-To: <1504068896-26534-1-git-send-email-leo.yan@linaro.org>

Hi Marc,

On Wed, Aug 30, 2017 at 12:54:56PM +0800, Leo Yan wrote:
> commit fa8d815fac96e7c9247783d5a1f8fa4685b3c543 upstream.
> 
> Cortex-A73 (all versions) counter read can return a wrong value
> when the counter crosses a 32bit boundary.
> 
> The workaround involves performing the read twice, and to return
> one or the other depending on whether a transition has taken place.
> 
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> Signed-off-by: Leo Yan <leo.yan@linaro.org>

I backported your patch for arch timer fixing for CA73, so I added you
SoB in this patch; hope I do right thing at here.

Just want to highlight this patch is different with mainline kernel.
In the mainline kernel there have many dependency patches to rework ARM
CPU feature detecting and add general workaround framework for ARM
arch timer. For me these are new features but not fixing for stability
issue. So this patch only ports minor fixing for stability issue;
finally this fix can be applied onto Android common kernel and can be
used for CA73 CPUs (like Hikey960 platform).

Please review and let me know if this is feasible for you.

Thanks,
Leo Yan

> ---
>  arch/arm64/Kconfig                  | 12 ++++++++++++
>  arch/arm64/include/asm/arch_timer.h | 11 +++++++++++
>  2 files changed, 23 insertions(+)
> 
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 14cdc6d..68e7c98 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -374,6 +374,18 @@ config ARM64_ERRATUM_843419
>  
>  	  If unsure, say Y.
>  
> +config ARM64_ERRATUM_858921
> +	bool "Cortex-A73: 858921: arch timer counter read can return a wrong value"
> +	default y
> +	depends on ARM_ARCH_TIMER && ARM64
> +	help
> +	  This option enables a workaround applicable to Cortex-A73
> +	  (all versions), whose counter may return incorrect values.
> +	  The workaround will be dynamically enabled when an affected
> +	  core is detected.
> +
> +	  If unsure, say Y.
> +
>  config CAVIUM_ERRATUM_22375
>  	bool "Cavium erratum 22375, 24313"
>  	default y
> diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
> index fbe0ca3..9b2b0f5 100644
> --- a/arch/arm64/include/asm/arch_timer.h
> +++ b/arch/arm64/include/asm/arch_timer.h
> @@ -114,6 +114,16 @@ static inline u64 arch_counter_get_cntpct(void)
>  	return 0;
>  }
>  
> +#ifdef CONFIG_ARM64_ERRATUM_858921
> +static inline u64 arch_counter_get_cntvct(void)
> +{
> +	u64 old, new;
> +
> +	asm volatile("mrs %0, cntvct_el0" : "=r" (old));
> +	asm volatile("mrs %0, cntvct_el0" : "=r" (new));
> +	return (((old ^ new) >> 32) & 1) ? old : new;
> +}
> +#else
>  static inline u64 arch_counter_get_cntvct(void)
>  {
>  	u64 cval;
> @@ -123,6 +133,7 @@ static inline u64 arch_counter_get_cntvct(void)
>  
>  	return cval;
>  }
> +#endif
>  
>  static inline int arch_timer_arch_init(void)
>  {
> -- 
> 2.7.4
> 

           reply	other threads:[~2017-08-30  5:03 UTC|newest]

Thread overview: expand[flat|nested]  mbox.gz  Atom feed
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