From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com ([192.55.52.120]:41709 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752448AbdKJP2e (ORCPT ); Fri, 10 Nov 2017 10:28:34 -0500 Date: Fri, 10 Nov 2017 17:28:28 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Maarten Lankhorst Cc: intel-gfx@lists.freedesktop.org, stable@vger.kernel.org Subject: Re: [Intel-gfx] [PATCH v3 01/11] drm/i915: Update watermark state correctly in sanitize_watermarks Message-ID: <20171110152828.GE10981@intel.com> References: <20171110113503.16253-1-maarten.lankhorst@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20171110113503.16253-1-maarten.lankhorst@linux.intel.com> Sender: stable-owner@vger.kernel.org List-ID: On Fri, Nov 10, 2017 at 12:34:53PM +0100, Maarten Lankhorst wrote: > We no longer use intel_crtc->wm.active for watermarks any more, > which was incorrect. But this uncovered a bug in sanitize_watermarks(), > which meant that we wrote the correct watermarks, but the next > update would still use the wrong hw watermarks for calculating. > This caused all further updates to fail with -EINVAL and the > log would reveal an error like the one below: > > [ 10.043902] [drm:ilk_validate_wm_level.part.8 [i915]] Sprite WM0 too large 56 (max 0) > [ 10.043960] [drm:ilk_validate_pipe_wm [i915]] LP0 watermark invalid > [ 10.044030] [drm:intel_crtc_atomic_check [i915]] No valid intermediate pipe watermarks are possible > > Signed-off-by: Maarten Lankhorst > Fixes: b6b178a77210 ("drm/i915: Calculate ironlake intermediate watermarks correctly, v2.") > Cc: stable@vger.kernel.org #v4.8+ > --- > drivers/gpu/drm/i915/intel_display.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 84817ccc5305..17665ee06c9a 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -14442,6 +14442,8 @@ static void sanitize_watermarks(struct drm_device *dev) > > cs->wm.need_postvbl_update = true; > dev_priv->display.optimize_watermarks(intel_state, cs); > + > + to_intel_crtc_state(crtc->state)->wm = cs->wm; Hmm. Oh we don't swap the state here. Looks like we shouldn't be using anything else from the crtc state, so this should work AFAICS. Reviewed-by: Ville Syrj�l� > } > > put_state: > -- > 2.15.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrj�l� Intel OTC