From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from shards.monkeyblade.net ([184.105.139.130]:36834 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750952AbdKTLxd (ORCPT ); Mon, 20 Nov 2017 06:53:33 -0500 Received: from localhost (unknown [61.40.109.130]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) (Authenticated sender: davem-davemloft) by shards.monkeyblade.net (Postfix) with ESMTPSA id 44C6F1340BCD7 for ; Mon, 20 Nov 2017 03:53:33 -0800 (PST) Date: Mon, 20 Nov 2017 20:53:31 +0900 (KST) Message-Id: <20171120.205331.1759913103870322256.davem@davemloft.net> To: stable@vger.kernel.org Subject: [PATCH] Sparc From: David Miller Mime-Version: 1.0 Content-Type: Multipart/Mixed; boundary="--Next_Part(Mon_Nov_20_20_53_31_2017_392)--" Content-Transfer-Encoding: 7bit Sender: stable-owner@vger.kernel.org List-ID: ----Next_Part(Mon_Nov_20_20_53_31_2017_392)-- Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Please queue up the following bug fix for 4.14.x -stable. Thank you. ----Next_Part(Mon_Nov_20_20_53_31_2017_392)-- Content-Type: Text/X-Patch; charset=us-ascii Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="0001-sparc64-Fix-page-table-walk-for-PUD-hugepages.patch" >>From fac33aa62841b69cd0e19a29b0e2ac96e4e8cf32 Mon Sep 17 00:00:00 2001 From: Nitin Gupta Date: Fri, 3 Nov 2017 12:26:06 -0700 Subject: [PATCH] sparc64: Fix page table walk for PUD hugepages [ Upstream commit 70f3c8b7c2e7ebcdde8354da004872e7c9184e97 ] For a PUD hugepage entry, we need to propagate bits [32:22] from virtual address to resolve at 4M granularity. However, the current code was incorrectly propagating bits [29:19]. This bug can cause incorrect data to be returned for pages backed with 16G hugepages. Signed-off-by: Nitin Gupta Reported-by: Al Viro Cc: Al Viro Signed-off-by: David S. Miller --- arch/sparc/include/asm/tsb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/sparc/include/asm/tsb.h b/arch/sparc/include/asm/tsb.h index 25b6abdb3908..522a677e050d 100644 --- a/arch/sparc/include/asm/tsb.h +++ b/arch/sparc/include/asm/tsb.h @@ -217,7 +217,7 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end; sllx REG2, 32, REG2; \ andcc REG1, REG2, %g0; \ be,pt %xcc, 700f; \ - sethi %hi(0x1ffc0000), REG2; \ + sethi %hi(0xffe00000), REG2; \ sllx REG2, 1, REG2; \ brgez,pn REG1, FAIL_LABEL; \ andn REG1, REG2, REG1; \ -- 2.13.6 ----Next_Part(Mon_Nov_20_20_53_31_2017_392)----