[PATCH 1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()

[PATCH 1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We're supposed to examine msgs[i] and msgs[i+1] to see if they
form a pair suitable for an indexed transfer. But in reality
we're examining msgs[0] and msgs[1]. Fix this.

Cc: stable@vger.kernel.org
Cc: Daniel Kurtz <djkurtz@chromium.org>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Sean Paul <seanpaul@chromium.org>
Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read transactions")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_i2c.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index eb5827110d8f..165375cbef2f 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -484,7 +484,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
 
 	for (; i < num; i += inc) {
 		inc = 1;
-		if (gmbus_is_index_read(msgs, i, num)) {
+		if (gmbus_is_index_read(&msgs[i], i, num)) {
 			ret = gmbus_xfer_index_read(dev_priv, &msgs[i]);
 			inc = 2; /* an index read is two msgs */
 		} else if (msgs[i].flags & I2C_M_RD) {
-- 
2.13.6

[PATCH 2/3] drm/i915: Don't try indexed reads to alternate slave addresses

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We can only specify the one slave address to indexed reads/writes.
Make sure the messages we check are destined to the same slave
address before deciding to do an indexed transfer.

Cc: stable@vger.kernel.org
Cc: Daniel Kurtz <djkurtz@chromium.org>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Sean Paul <seanpaul@chromium.org>
Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read transactions")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_i2c.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 165375cbef2f..4b4528d7010f 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -438,6 +438,7 @@ static bool
 gmbus_is_index_read(struct i2c_msg *msgs, int i, int num)
 {
 	return (i + 1 < num &&
+		msgs[i].addr == msgs[i + 1].addr &&
 		!(msgs[i].flags & I2C_M_RD) && msgs[i].len <= 2 &&
 		(msgs[i + 1].flags & I2C_M_RD));
 }
-- 
2.13.6

[PATCH 3/3] drm/i915: Prevent zero length "index" write

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The hardware always writes one or two bytes in the index portion of
an indexed transfer. Make sure the message we send as the index
doesn't have a zero length.

Cc: stable@vger.kernel.org
Cc: Daniel Kurtz <djkurtz@chromium.org>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Sean Paul <seanpaul@chromium.org>
Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read transactions")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_i2c.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 4b4528d7010f..8c6b26b5c3fb 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -439,7 +439,8 @@ gmbus_is_index_read(struct i2c_msg *msgs, int i, int num)
 {
 	return (i + 1 < num &&
 		msgs[i].addr == msgs[i + 1].addr &&
-		!(msgs[i].flags & I2C_M_RD) && msgs[i].len <= 2 &&
+		!(msgs[i].flags & I2C_M_RD) &&
+		(msgs[i].len == 1 || msgs[i].len == 2) &&
 		(msgs[i + 1].flags & I2C_M_RD));
 }
 
-- 
2.13.6

Re: [PATCH 1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()

[Chris Wilson]

Quoting Ville Syrjala (2017-11-23 19:41:55)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> We're supposed to examine msgs[i] and msgs[i+1] to see if they
> form a pair suitable for an indexed transfer. But in reality
> we're examining msgs[0] and msgs[1]. Fix this.
> 
> Cc: stable@vger.kernel.org
> Cc: Daniel Kurtz <djkurtz@chromium.org>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Sean Paul <seanpaul@chromium.org>
> Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read transactions")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_i2c.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
> index eb5827110d8f..165375cbef2f 100644
> --- a/drivers/gpu/drm/i915/intel_i2c.c
> +++ b/drivers/gpu/drm/i915/intel_i2c.c
> @@ -484,7 +484,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
>  
>         for (; i < num; i += inc) {
>                 inc = 1;
> -               if (gmbus_is_index_read(msgs, i, num)) {
> +               if (gmbus_is_index_read(&msgs[i], i, num)) {

i is passed to gmbus_is_index_read() and used as an index into msgs. So
this should be accounted for right?
-Chris

Re: [PATCH 2/3] drm/i915: Don't try indexed reads to alternate slave addresses

[Chris Wilson]

Quoting Ville Syrjala (2017-11-23 19:41:56)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> We can only specify the one slave address to indexed reads/writes.
> Make sure the messages we check are destined to the same slave
> address before deciding to do an indexed transfer.
> 
> Cc: stable@vger.kernel.org
> Cc: Daniel Kurtz <djkurtz@chromium.org>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Sean Paul <seanpaul@chromium.org>
> Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read transactions")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris

Re: [PATCH 3/3] drm/i915: Prevent zero length "index" write

[Chris Wilson]

Quoting Ville Syrjala (2017-11-23 19:41:57)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The hardware always writes one or two bytes in the index portion of
> an indexed transfer. Make sure the message we send as the index
> doesn't have a zero length.
> 
> Cc: stable@vger.kernel.org
> Cc: Daniel Kurtz <djkurtz@chromium.org>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Sean Paul <seanpaul@chromium.org>
> Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read transactions")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris

Re: [PATCH 1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()

[Ville Syrjälä]

On Thu, Nov 23, 2017 at 08:50:41PM +0000, Chris Wilson wrote:
> Quoting Ville Syrjala (2017-11-23 19:41:55)
> > From: Ville Syrj�l� <ville.syrjala@linux.intel.com>
> > 
> > We're supposed to examine msgs[i] and msgs[i+1] to see if they
> > form a pair suitable for an indexed transfer. But in reality
> > we're examining msgs[0] and msgs[1]. Fix this.
> > 
> > Cc: stable@vger.kernel.org
> > Cc: Daniel Kurtz <djkurtz@chromium.org>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> > Cc: Sean Paul <seanpaul@chromium.org>
> > Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read transactions")
> > Signed-off-by: Ville Syrj�l� <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_i2c.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
> > index eb5827110d8f..165375cbef2f 100644
> > --- a/drivers/gpu/drm/i915/intel_i2c.c
> > +++ b/drivers/gpu/drm/i915/intel_i2c.c
> > @@ -484,7 +484,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
> >  
> >         for (; i < num; i += inc) {
> >                 inc = 1;
> > -               if (gmbus_is_index_read(msgs, i, num)) {
> > +               if (gmbus_is_index_read(&msgs[i], i, num)) {
> 
> i is passed to gmbus_is_index_read() and used as an index into msgs. So
> this should be accounted for right?

Doh. Yep, this patch is nonsense.

-- 
Ville Syrj�l�
Intel OTC

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()

[Ville Syrjälä]

On Fri, Nov 24, 2017 at 02:55:28PM +0200, Ville Syrj�l� wrote:
> On Thu, Nov 23, 2017 at 08:50:41PM +0000, Chris Wilson wrote:
> > Quoting Ville Syrjala (2017-11-23 19:41:55)
> > > From: Ville Syrj�l� <ville.syrjala@linux.intel.com>
> > > 
> > > We're supposed to examine msgs[i] and msgs[i+1] to see if they
> > > form a pair suitable for an indexed transfer. But in reality
> > > we're examining msgs[0] and msgs[1]. Fix this.
> > > 
> > > Cc: stable@vger.kernel.org
> > > Cc: Daniel Kurtz <djkurtz@chromium.org>
> > > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> > > Cc: Sean Paul <seanpaul@chromium.org>
> > > Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read transactions")
> > > Signed-off-by: Ville Syrj�l� <ville.syrjala@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_i2c.c | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
> > > index eb5827110d8f..165375cbef2f 100644
> > > --- a/drivers/gpu/drm/i915/intel_i2c.c
> > > +++ b/drivers/gpu/drm/i915/intel_i2c.c
> > > @@ -484,7 +484,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
> > >  
> > >         for (; i < num; i += inc) {
> > >                 inc = 1;
> > > -               if (gmbus_is_index_read(msgs, i, num)) {
> > > +               if (gmbus_is_index_read(&msgs[i], i, num)) {
> > 
> > i is passed to gmbus_is_index_read() and used as an index into msgs. So
> > this should be accounted for right?
> 
> Doh. Yep, this patch is nonsense.

The two other patches pushed to dinq. Thanks catching my mistake with
this one.

-- 
Ville Syrj�l�
Intel OTC