From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com ([134.134.136.65]:8863 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752517AbeDDPef (ORCPT ); Wed, 4 Apr 2018 11:34:35 -0400 Date: Wed, 4 Apr 2018 18:34:29 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Lyude Paul Cc: intel-gfx@lists.freedesktop.org, Laura Abbott , Dhinakaran Pandiyan , stable@vger.kernel.org, Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] drm/i915: Keep AUX block running when disabling DPMS for MST Message-ID: <20180404153429.GE5453@intel.com> References: <20180402212142.19841-1-lyude@redhat.com> <20180402212617.21247-1-lyude@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20180402212617.21247-1-lyude@redhat.com> Sender: stable-owner@vger.kernel.org List-ID: On Mon, Apr 02, 2018 at 05:26:16PM -0400, Lyude Paul wrote: > While enabling/disabling DPMS before link training with MST hubs is > perfectly valid; unfortunately disabling DPMS results in some devices > disabling their AUX CH block as well. For SST this isn't as much of a > problem, but for MST we need to be able to continue handling aux > transactions even when none of the sinks are turned on since it's > possible for us to have a single atomic commit which results in > disabling each downstream sink, followed by subsequently re-enabling > each sink. > > If we don't do this, we'll end up stalling any pending ESI interrupts > from the sink for up to 1ms. Unfortunately, dropping ESIs during this > timespan makes it so that link fallback retraining for MST (which I will > be submitting to the ML shortly) fails due to the channel EQ failure > interrupts potentially getting dropped. Additionally, when performing a > modeset that brings the hub status's link status from bad -> good having > ESIs disabled for that long causes us to miss the hub's response to us > trying to start link training as well. > > Since any sink with MST is going to support DisplayPort 1.2 anyway, save > us the hassle of trying to wait until the sink comes back up and just > never shut the aux block down. > > Changes since v2: > - Fix patch name, no functional changes > > Signed-off-by: Lyude Paul > Cc: Laura Abbott > Cc: Dhinakaran Pandiyan > Cc: Ville Syrj�l� > Cc: stable@vger.kernel.org > Fixes: ad260ab32a4d9 ("drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.") > --- > drivers/gpu/drm/i915/intel_dp.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 62f82c4298ac..0479c377981b 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -2589,11 +2589,13 @@ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode) > return; > > if (mode != DRM_MODE_DPMS_ON) { > + unsigned char data = intel_dp->is_mst ? > + DP_SET_POWER_D3_AUX_ON : DP_SET_POWER_D3; This smells like a workaround for an actual bug somewhere. Why exactly is the slower wakeup or the AUX block a problem for MST but not for SST when the link training is exactly the same for SST and MST? > + > if (downstream_hpd_needs_d0(intel_dp)) > return; > > - ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, > - DP_SET_POWER_D3); > + ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, data); > } else { > struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp); > > -- > 2.14.3 -- Ville Syrj�l� Intel OTC