[PATCH] drm/i915/bdw: Increase IPS disable timeout to 100ms

[PATCH] drm/i915/bdw: Increase IPS disable timeout to 100ms

[Imre Deak]

During IPS disabling the current 42ms timeout value leads to occasional
timeouts, increase it to 100ms which seems to get rid of the problem.

References: https://bugs.freedesktop.org/show_bug.cgi?id=107494
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107562
Reported-by: Diego Viola <diego.viola@gmail.com>
Tested-by: Diego Viola <diego.viola@gmail.com>
Cc: Diego Viola <diego.viola@gmail.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a85a83f31979..1bd14c61dab5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5082,10 +5082,14 @@ void hsw_disable_ips(const struct intel_crtc_state *crtc_state)
 		mutex_lock(&dev_priv->pcu_lock);
 		WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, 0));
 		mutex_unlock(&dev_priv->pcu_lock);
-		/* wait for pcode to finish disabling IPS, which may take up to 42ms */
+		/*
+		 * Wait for PCODE to finish disabling IPS. The BSpec specified
+		 * 42ms timeout value leads to occasional timeouts so use 100ms
+		 * instead.
+		 */
 		if (intel_wait_for_register(dev_priv,
 					    IPS_CTL, IPS_ENABLE, 0,
-					    42))
+					    100))
 			DRM_ERROR("Timed out waiting for IPS disable\n");
 	} else {
 		I915_WRITE(IPS_CTL, 0);
-- 
2.13.2

Re: [Intel-gfx] [PATCH] drm/i915/bdw: Increase IPS disable timeout to 100ms

[Ville Syrjälä]

On Wed, Sep 05, 2018 at 01:00:05PM +0300, Imre Deak wrote:
> During IPS disabling the current 42ms timeout value leads to occasional
> timeouts, increase it to 100ms which seems to get rid of the problem.
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=107494
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107562
> Reported-by: Diego Viola <diego.viola@gmail.com>
> Tested-by: Diego Viola <diego.viola@gmail.com>
> Cc: Diego Viola <diego.viola@gmail.com>
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Ville Syrj�l� <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a85a83f31979..1bd14c61dab5 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5082,10 +5082,14 @@ void hsw_disable_ips(const struct intel_crtc_state *crtc_state)
>  		mutex_lock(&dev_priv->pcu_lock);
>  		WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, 0));
>  		mutex_unlock(&dev_priv->pcu_lock);
> -		/* wait for pcode to finish disabling IPS, which may take up to 42ms */
> +		/*
> +		 * Wait for PCODE to finish disabling IPS. The BSpec specified
> +		 * 42ms timeout value leads to occasional timeouts so use 100ms
> +		 * instead.
> +		 */
>  		if (intel_wait_for_register(dev_priv,
>  					    IPS_CTL, IPS_ENABLE, 0,
> -					    42))
> +					    100))
>  			DRM_ERROR("Timed out waiting for IPS disable\n");
>  	} else {
>  		I915_WRITE(IPS_CTL, 0);
> -- 
> 2.13.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrj�l�
Intel