From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-eopbgr690133.outbound.protection.outlook.com ([40.107.69.133]:54795 "EHLO NAM04-CO1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727862AbeIGFQW (ORCPT ); Fri, 7 Sep 2018 01:16:22 -0400 From: Sasha Levin To: "stable@vger.kernel.org" , "linux-kernel@vger.kernel.org" CC: Miao Zhong , Will Deacon , Robin Murphy , Sasha Levin Subject: [PATCH AUTOSEL 4.14 03/67] iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register Date: Fri, 7 Sep 2018 00:37:22 +0000 Message-ID: <20180907003716.57737-3-alexander.levin@microsoft.com> References: <20180907003716.57737-1-alexander.levin@microsoft.com> In-Reply-To: <20180907003716.57737-1-alexander.levin@microsoft.com> Content-Language: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org List-ID: From: Miao Zhong [ Upstream commit 0d535967ac658966c6ade8f82b5799092f7d5441 ] When PRI queue occurs overflow, driver should update the OVACKFLG to the PRIQ consumer register, otherwise subsequent PRI requests will not be processed. Cc: Will Deacon Cc: Robin Murphy Signed-off-by: Miao Zhong Signed-off-by: Will Deacon Signed-off-by: Sasha Levin --- drivers/iommu/arm-smmu-v3.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 8f7a3c00b6cf..26e99c03390f 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -1272,6 +1272,7 @@ static irqreturn_t arm_smmu_priq_thread(int irq, void= *dev) =20 /* Sync our overflow flag, as we believe we're up to speed */ q->cons =3D Q_OVF(q, q->prod) | Q_WRP(q, q->cons) | Q_IDX(q, q->cons); + writel(q->cons, q->cons_reg); return IRQ_HANDLED; } =20 --=20 2.17.1