From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-eopbgr700137.outbound.protection.outlook.com ([40.107.70.137]:63424 "EHLO NAM04-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728551AbeIOGry (ORCPT ); Sat, 15 Sep 2018 02:47:54 -0400 From: Sasha Levin To: "stable@vger.kernel.org" , "linux-kernel@vger.kernel.org" CC: Suzuki K Poulose , Mathieu Poirier , Greg Kroah-Hartman , Sasha Levin Subject: [PATCH AUTOSEL 4.18 49/92] coresight: ETM: Add support for Arm Cortex-A73 and Cortex-A35 Date: Sat, 15 Sep 2018 01:30:23 +0000 Message-ID: <20180915012944.179481-48-alexander.levin@microsoft.com> References: <20180915012944.179481-1-alexander.levin@microsoft.com> In-Reply-To: <20180915012944.179481-1-alexander.levin@microsoft.com> Content-Language: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org List-ID: From: Suzuki K Poulose [ Upstream commit 5cedd22370a0a460b663c06de1fc10b4ba3c5d0b ] Add ETM PIDs of the Arm cortex-A CPUs to the white list of ETMs. While at it add a helper macro to make it easier to add the new entries. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose Signed-off-by: Mathieu Poirier Signed-off-by: Greg Kroah-Hartman Signed-off-by: Sasha Levin --- drivers/hwtracing/coresight/coresight-etm4x.c | 31 +++++++++---------- 1 file changed, 14 insertions(+), 17 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtrac= ing/coresight/coresight-etm4x.c index 9bc04c50d45b..1d94ebec027b 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -1027,7 +1027,8 @@ static int etm4_probe(struct amba_device *adev, const= struct amba_id *id) } =20 pm_runtime_put(&adev->dev); - dev_info(dev, "%s initialized\n", (char *)id->data); + dev_info(dev, "CPU%d: ETM v%d.%d initialized\n", + drvdata->cpu, drvdata->arch >> 4, drvdata->arch & 0xf); =20 if (boot_enable) { coresight_enable(drvdata->csdev); @@ -1045,23 +1046,19 @@ err_arch_supported: return ret; } =20 +#define ETM4x_AMBA_ID(pid) \ + { \ + .id =3D pid, \ + .mask =3D 0x000fffff, \ + } + static const struct amba_id etm4_ids[] =3D { - { /* ETM 4.0 - Cortex-A53 */ - .id =3D 0x000bb95d, - .mask =3D 0x000fffff, - .data =3D "ETM 4.0", - }, - { /* ETM 4.0 - Cortex-A57 */ - .id =3D 0x000bb95e, - .mask =3D 0x000fffff, - .data =3D "ETM 4.0", - }, - { /* ETM 4.0 - A72, Maia, HiSilicon */ - .id =3D 0x000bb95a, - .mask =3D 0x000fffff, - .data =3D "ETM 4.0", - }, - { 0, 0}, + ETM4x_AMBA_ID(0x000bb95d), /* Cortex-A53 */ + ETM4x_AMBA_ID(0x000bb95e), /* Cortex-A57 */ + ETM4x_AMBA_ID(0x000bb95a), /* Cortex-A72 */ + ETM4x_AMBA_ID(0x000bb959), /* Cortex-A73 */ + ETM4x_AMBA_ID(0x000bb9da), /* Cortex-A35 */ + {}, }; =20 static struct amba_driver etm4x_driver =3D { --=20 2.17.1