From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sn1nam01on0093.outbound.protection.outlook.com ([104.47.32.93]:10176 "EHLO NAM01-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728757AbeIQIc2 (ORCPT ); Mon, 17 Sep 2018 04:32:28 -0400 From: Sasha Levin To: "stable@vger.kernel.org" , "linux-kernel@vger.kernel.org" CC: Alexey Kardashevskiy , Michael Ellerman , Sasha Levin Subject: [PATCH AUTOSEL 4.4 21/43] powerpc/powernv/ioda2: Reduce upper limit for DMA window size Date: Mon, 17 Sep 2018 03:05:02 +0000 Message-ID: <20180917030445.484-21-alexander.levin@microsoft.com> References: <20180917030445.484-1-alexander.levin@microsoft.com> In-Reply-To: <20180917030445.484-1-alexander.levin@microsoft.com> Content-Language: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org List-ID: From: Alexey Kardashevskiy [ Upstream commit d3d4ffaae439981e1e441ebb125aa3588627c5d8 ] We use PHB in mode1 which uses bit 59 to select a correct DMA window. However there is mode2 which uses bits 59:55 and allows up to 32 DMA windows per a PE. Even though documentation does not clearly specify that, it seems that the actual hardware does not support bits 59:55 even in mode1, in other words we can create a window as big as 1<<58 but DMA simply won't work. This reduces the upper limit from 59 to 55 bits to let the userspace know about the hardware limits. Fixes: 7aafac11e3 "powerpc/powernv/ioda2: Gracefully fail if too many TCE l= evels requested" Signed-off-by: Alexey Kardashevskiy Signed-off-by: Michael Ellerman Signed-off-by: Sasha Levin --- arch/powerpc/platforms/powernv/pci-ioda.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platf= orms/powernv/pci-ioda.c index eac3b7cc78c6..ab7b2594e0f6 100644 --- a/arch/powerpc/platforms/powernv/pci-ioda.c +++ b/arch/powerpc/platforms/powernv/pci-ioda.c @@ -2270,7 +2270,7 @@ static long pnv_pci_ioda2_table_alloc_pages(int nid, = __u64 bus_offset, level_shift =3D entries_shift + 3; level_shift =3D max_t(unsigned, level_shift, PAGE_SHIFT); =20 - if ((level_shift - 3) * levels + page_shift >=3D 60) + if ((level_shift - 3) * levels + page_shift >=3D 55) return -EINVAL; =20 /* Allocate TCE table */ --=20 2.17.1