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Date: Wed, 7 Nov 2018 10:26:08 +0100
From: Greg KH <gregkh@linuxfoundation.org>
To: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
Cc: stable@vger.kernel.org, Thomas Gleixner <tglx@linutronix.de>,
        Tim C Chen <tim.c.chen@intel.com>,
        Dave Hansen <dave.hansen@intel.com>,
        Ravi Shankar <ravi.v.shankar@intel.com>,
        Andi Kleen <ak@linux.intel.com>
Subject: Re: [PATCH] x86/speculation: Support Enhanced IBRS on future CPUs
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References: <1541550365-95079-1-git-send-email-sai.praneeth.prakhya@intel.com>
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On Tue, Nov 06, 2018 at 04:26:05PM -0800, Sai Praneeth Prakhya wrote:
> From: Sai Praneeth <sai.praneeth.prakhya@intel.com>
> 
> [ Upstream commit 706d51681d636a0c4a5ef53395ec3b803e45ed4d ]
> 
> Changes from upstream:
> ----------------------
> 1. Use bit 30 of word 7 in cpufeatures for X86_FEATURE_IBRS_ENHANCED as bit 29
>    is now used by L1TF.
> 2. Fix some trivial line fuzzing.
> 
> Note: Based on kernel version "Linux 4.18.17" and to be applied on both "Linux
> 4.18.17" and "Linux 4.14.79".

Ah, here's the other patch, please fix it up so I do not have to
hand-edit a file to apply this.

greg k-h