From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Viresh Kumar <vireshk@kernel.org>,
dmaengine@vger.kernel.org, Vinod Koul <vkoul@kernel.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
stable@vger.kernel.org
Subject: [PATCH v2 1/7] dmaengine: dw: Add missed multi-block support for iDMA 32-bit
Date: Wed, 5 Dec 2018 18:28:12 +0200 [thread overview]
Message-ID: <20181205162818.45112-2-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <20181205162818.45112-1-andriy.shevchenko@linux.intel.com>
Intel integrated DMA 32-bit support multi-block transfers.
Add missed setting to the platform data.
Fixes: f7c799e950f9 ("dmaengine: dw: we do support Merrifield SoC in PCI mode")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: stable@vger.kernel.org
---
drivers/dma/dw/pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/dma/dw/pci.c b/drivers/dma/dw/pci.c
index 7778ed705a1a..313ba10c6224 100644
--- a/drivers/dma/dw/pci.c
+++ b/drivers/dma/dw/pci.c
@@ -25,6 +25,7 @@ static struct dw_dma_platform_data mrfld_pdata = {
.block_size = 131071,
.nr_masters = 1,
.data_width = {4},
+ .multi_block = {1, 1, 1, 1, 1, 1, 1, 1},
};
static int dw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid)
--
2.19.2
next parent reply other threads:[~2018-12-05 16:28 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20181205162818.45112-1-andriy.shevchenko@linux.intel.com>
2018-12-05 16:28 ` Andy Shevchenko [this message]
2018-12-05 18:12 ` [PATCH v2 1/7] dmaengine: dw: Add missed multi-block support for iDMA 32-bit Vinod Koul
2018-12-07 13:32 ` Andy Shevchenko
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