From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 142E3C43387 for ; Mon, 31 Dec 2018 15:29:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D2DA221720 for ; Mon, 31 Dec 2018 15:29:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1546270167; bh=ep05JDV0jUZt3JPGp9M2KlJH4vaZEgl8Hdop8Y4VudM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=K6l/UPq+f34rfSrDecTXcBZfmELw5z8fVDEbOd2Xu2RhYEFt+CKa82CWweCNkh6xS 3PPvIWkAoBo1+GVN+CBWaGrgX5s6Kp5JiE1x0qfs50GogsdLVXApFPtb4lbbbSOHpm aLQwWr1vuP2/t2/Yw6HP94wWOVwXOr0c7d7fpDMI= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726183AbeLaP31 (ORCPT ); Mon, 31 Dec 2018 10:29:27 -0500 Received: from mail.kernel.org ([198.145.29.99]:58172 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725899AbeLaP31 (ORCPT ); Mon, 31 Dec 2018 10:29:27 -0500 Received: from localhost (unknown [69.71.4.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 450502133F; Mon, 31 Dec 2018 15:29:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1546270166; bh=ep05JDV0jUZt3JPGp9M2KlJH4vaZEgl8Hdop8Y4VudM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=mt0r7B0iq02qpZwkWngDX5Luz/oENZKBhgEcBqkTHCTQcRyFPofeZML5H1E9YBOqQ tdH+hVzbPtNVeaIHfgLU9Iy3EtQ5aCx4FerbGPIi16vBMMlfHLuxi9M5ZBGDpk/YWr K8GJ97dJjnBde51sDxnTnWd20bkbwedHDdoB/dmk= Date: Mon, 31 Dec 2018 09:29:18 -0600 From: Bjorn Helgaas To: Krzysztof =?utf-8?Q?Ha=C5=82asa?= Cc: Rob Herring , Arnd Bergmann , linux-pci@vger.kernel.org, Tim Harvey , Russell King , stable@vger.kernel.org, Robin Leblon , Koen Vandeputte , Olof Johansson , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH] arm: cns3xxx: fix writing to wrong PCI registers after alignment Message-ID: <20181231152918.GE159477@google.com> References: <20181218111743.25566-1-koen.vandeputte@ncentric.com> <20181230010625.GC159477@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org On Mon, Dec 31, 2018 at 11:14:28AM +0100, Krzysztof Hałasa wrote: > Bjorn Helgaas writes: > > > 802b7c06adc7 replaced cns3xxx_pci_write_config(), which always used > > __raw_writel() so it only did 32-bit accesses, with > > pci_generic_config_write(), which uses writeb/writew/writel() > > depending on the size. > > > > 802b7c06adc7 also converted cns3xxx_pci_read_config() from always > > using __raw_readl() (a 32-bit access) to using > > pci_generic_config_read32(), which also always does a 32-bit access. > > > > This makes me think the cnx3xxx hardware is only capable of 32-bit > > accesses, and this patch should change the driver to use > > pci_generic_config_write32() instead of pci_generic_config_write() in > > addition to the mapping fix above. > > Hasn't it already been verified that the CNS3xxx can do 8-bit accesses > (and probably 16-bit ones as well), and that the docs don't mention any > such limitation? Quite possibly. I'm not familiar with the hardware or docs so can't comment personally. 802b7c06adc7 reimplemented cns3xxx_pci_read_config() using pci_generic_config_read32(), which preserved the property of only doing 32-bit reads. It replaced cns3xxx_pci_write_config() with pci_generic_config_write(), so it changed writes from always being 32 bits to being the actual size. I think this was an error in the original commit, since the changelog doesn't mention this change; in fact, the changelog says it changes __raw_writel to writel. The change from 32-bit to actual size accesses would logically be a separate commit from changing to use the generic accessors. Assuming the hardware does support smaller accesses, I'd propose two patches: 1) The current one that corrects the address alignment error, and 2) A new one that converts cns3xxx_pci_read_config() to use pci_generic_config_read() instead of pci_generic_config_read32(). Ideally the changelog for the second patch would refer to the verification that the hardware is capable of 8- and 16-bit accesses. Bjorn