From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52754C10F01 for ; Mon, 18 Feb 2019 13:59:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 24F3C217D9 for ; Mon, 18 Feb 2019 13:59:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1550498375; bh=X15JsUl+Ec2Ozny10O2a4xlCNIAoQ8hI4PNfrma1qnA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=lxI6ohmSAMBlUjcDXjQzrYBkaz18yQuJPGOfx2iwtWgXijSm3oiXkAv+r3jKc8/+g WgF+Vx82NQJ1YTjM0JNwQcndkhGvITbkg5GJR1K15bfthKvWblH6weBNGArYlYfkaZ t14Hrc45zXoRt4WRHXxKRx/E+yab7yxiLm9fw0pY= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388573AbfBRN7e (ORCPT ); Mon, 18 Feb 2019 08:59:34 -0500 Received: from mail.kernel.org ([198.145.29.99]:40526 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388592AbfBRN7d (ORCPT ); Mon, 18 Feb 2019 08:59:33 -0500 Received: from localhost (5356596B.cm-6-7b.dynamic.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1E4612070D; Mon, 18 Feb 2019 13:59:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1550498372; bh=X15JsUl+Ec2Ozny10O2a4xlCNIAoQ8hI4PNfrma1qnA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ORhGc5haqHHl0yvhlAyzXmRoLDXE/4Dp2lj0aFTDgj01Ro/tm/xVh4gxszULq3R8i cYKhCt8g6ek+R8SkOAD/5RrXvh9I4lgdADjVh9toftuTbIwXFbuydCOTHqmEdlIyki JdFGdTulG+SxdzSst1wNkGnkTnma2JDDZGnK2E7k= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Tomi Valkeinen , Andrzej Hajda , Sasha Levin Subject: [PATCH 4.9 26/58] drm/bridge: tc358767: fix initial DP0/1_SRCCTRL value Date: Mon, 18 Feb 2019 14:43:47 +0100 Message-Id: <20190218133510.605405097@linuxfoundation.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190218133508.567416115@linuxfoundation.org> References: <20190218133508.567416115@linuxfoundation.org> User-Agent: quilt/0.65 X-stable: review X-Patchwork-Hint: ignore MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org 4.9-stable review patch. If anyone has any objections, please let me know. ------------------ [ Upstream commit 9a63bd6fe1b5590ffa42ae2ed22ee21363293e31 ] Initially DP0_SRCCTRL is set to a static value which includes DP0_SRCCTRL_LANES_2 and DP0_SRCCTRL_BW27, even when only 1 lane of 1.62Gbps speed is used. DP1_SRCCTRL is configured to a magic number. This patch changes the configuration as follows: Configure DP0_SRCCTRL by using tc_srcctrl() which provides the correct value. DP1_SRCCTRL needs two bits to be set to the same value as DP0_SRCCTRL: SSCG and BW27. All other bits can be zero. Signed-off-by: Tomi Valkeinen Reviewed-by: Andrzej Hajda Signed-off-by: Andrzej Hajda Link: https://patchwork.freedesktop.org/patch/msgid/20190103115954.12785-5-tomi.valkeinen@ti.com Signed-off-by: Sasha Levin --- drivers/gpu/drm/bridge/tc358767.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 8098297c5fe5..dbe403ea130d 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -834,12 +834,11 @@ static int tc_main_link_setup(struct tc_data *tc) if (!tc->mode) return -EINVAL; - /* from excel file - DP0_SrcCtrl */ - tc_write(DP0_SRCCTRL, DP0_SRCCTRL_SCRMBLDIS | DP0_SRCCTRL_EN810B | - DP0_SRCCTRL_LANESKEW | DP0_SRCCTRL_LANES_2 | - DP0_SRCCTRL_BW27 | DP0_SRCCTRL_AUTOCORRECT); - /* from excel file - DP1_SrcCtrl */ - tc_write(DP1_SRCCTRL, 0x00003083); + tc_write(DP0_SRCCTRL, tc_srcctrl(tc)); + /* SSCG and BW27 on DP1 must be set to the same as on DP0 */ + tc_write(DP1_SRCCTRL, + (tc->link.spread ? DP0_SRCCTRL_SSCG : 0) | + ((tc->link.base.rate != 162000) ? DP0_SRCCTRL_BW27 : 0)); rate = clk_get_rate(tc->refclk); switch (rate) { -- 2.19.1