From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9243DC43381 for ; Tue, 19 Feb 2019 19:03:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 52B972147C for ; Tue, 19 Feb 2019 19:03:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="iKBG7Xaw" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728667AbfBSTDU (ORCPT ); Tue, 19 Feb 2019 14:03:20 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:38555 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725963AbfBSTDU (ORCPT ); Tue, 19 Feb 2019 14:03:20 -0500 Received: by mail-wr1-f67.google.com with SMTP id v13so23180098wrw.5 for ; Tue, 19 Feb 2019 11:03:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tkr/wbBrEViZnOnohK1gaoso6Gti40p0yTOgCrFXvI8=; b=iKBG7XawCQCLNXIsuRPyW47VWDvAE69bNMPsEULG/f/X/aRjBzenqxE+CnOpnf8bNu L0E+jyp6uWSSnPYiOZIvzHcTsZzrURNORG5GizLd6wa1HSD5xatAkDlzLcgJQxcTyM37 LxVquM+mxs8yl6W9F/s2VD8cpdvNsM6OkB/jLwPlW1x4MmRZyz1kTRHGrGT9PsR2tqZ5 LWiGBV13tjla9+cAJrHJ79qkE1t9nBkCaBXqa51+ymj8uuoQ+FC+oFqG7zzTfV6l9Azu 0AR1HgOcj+60hRJQIMj9TA+KTPINuiBwt7ITlPLWyTihyGVlMu4MIq5MLJAy3AqFJQ0o 2uKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tkr/wbBrEViZnOnohK1gaoso6Gti40p0yTOgCrFXvI8=; b=Pt+K6EHQUZhF3gg8hyS82M9u1lMt0LlWhLAqwLQdMZPyG66PD25N08Sj1Mn4bUiqOC INQTLuHR5RnUpytv1LI+lflPKIgS1QWvORKwu9szkJ2+fIqwlsqvne8Hbk4Kag4o5WTu 8zC09eyzchnJOIBoc4JfDi0uj1VIWtIcwwMsDlJCmIBTuj2z/idFCbfxc3DxQmbRP8SZ r8c9dMq69BBxiOVJA52RUq35IjQ9DRZvuinWXR+LH29+nbausaz51ksx3frd1qJ28QIn wY4LRw/9SFo+MXa7NKtUvRdwI68Q8om2VjL4EXi7F7/S6F4t9yMQJi2hxdAIM8oZdPvy cs4A== X-Gm-Message-State: AHQUAuYentiIX+4xqZ60SM4TNIT3fiWjpAV5r+GiE+F3tcSNQOMIz1Fd 9Z4XjtATJrEdMAP90/7QWkS5BM6HKKg= X-Google-Smtp-Source: AHgI3IZEvZSu0zHeCJEh3WaAuiKk/qYtzl+65AdY+WTzv/OgD3Ge3TITRi1KJuS8m/vB1LV16pAW9A== X-Received: by 2002:adf:dd8a:: with SMTP id x10mr16448815wrl.117.1550602997939; Tue, 19 Feb 2019 11:03:17 -0800 (PST) Received: from sudo.home ([2a01:cb1d:112:6f00:99c6:fb2:8598:fb86]) by smtp.gmail.com with ESMTPSA id f7sm14778334wru.3.2019.02.19.11.03.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 11:03:16 -0800 (PST) From: Ard Biesheuvel To: stable@vger.kernel.org Cc: Ard Biesheuvel Subject: [PATCH 1/2] arm64, mm, efi: Account for GICv3 LPI tables in static memblock reserve table Date: Tue, 19 Feb 2019 20:03:12 +0100 Message-Id: <20190219190313.2477-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190219190313.2477-1-ard.biesheuvel@linaro.org> References: <20190219190313.2477-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org Commit 8a5b403d71affa098009cc3dff1b2c45113021ad upstream. In the irqchip and EFI code, we have what basically amounts to a quirk to work around a peculiarity in the GICv3 architecture, which permits the system memory address of LPI tables to be programmable only once after a CPU reset. This means kexec kernels must use the same memory as the first kernel, and thus ensure that this memory has not been given out for other purposes by the time the ITS init code runs, which is not very early for secondary CPUs. On systems with many CPUs, these reservations could overflow the memblock reservation table, and this was addressed in commit: eff896288872 ("efi/arm: Defer persistent reservations until after paging_init()") However, this turns out to have made things worse, since the allocation of page tables and heap space for the resized memblock reservation table itself may overwrite the regions we are attempting to reserve, which may cause all kinds of corruption, also considering that the ITS will still be poking bits into that memory in response to incoming MSIs. So instead, let's grow the static memblock reservation table on such systems so it can accommodate these reservations at an earlier time. This will permit us to revert the above commit in a subsequent patch. [ mingo: Minor cleanups. ] Signed-off-by: Ard Biesheuvel Acked-by: Mike Rapoport Acked-by: Will Deacon Acked-by: Marc Zyngier Cc: Andrew Morton Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Cc: linux-arm-kernel@lists.infradead.org Cc: linux-efi@vger.kernel.org Link: http://lkml.kernel.org/r/20190215123333.21209-2-ard.biesheuvel@linaro.org Signed-off-by: Ingo Molnar [ ardb: Double the size of the slack to account for the lack of an optimization that was introduced in mainline after the release of v4.20. ] Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/memory.h | 11 +++++++++++ include/linux/memblock.h | 3 --- mm/memblock.c | 11 +++++++++-- 3 files changed, 20 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h index 778af0b7f7fd..c67081301035 100644 --- a/arch/arm64/include/asm/memory.h +++ b/arch/arm64/include/asm/memory.h @@ -303,6 +303,17 @@ static inline void *phys_to_virt(phys_addr_t x) #define virt_addr_valid(kaddr) (_virt_addr_is_linear(kaddr) && \ _virt_addr_valid(kaddr)) +/* + * Given that the GIC architecture permits ITS implementations that can only be + * configured with a LPI table address once, GICv3 systems with many CPUs may + * end up reserving a lot of different regions after a kexec for their LPI + * tables (one per CPU), as we are forced to reuse the same memory after kexec + * (and thus reserve it persistently with EFI beforehand) + */ +#if defined(CONFIG_EFI) && defined(CONFIG_ARM_GIC_V3_ITS) +# define INIT_MEMBLOCK_RESERVED_REGIONS (INIT_MEMBLOCK_REGIONS + 2*(NR_CPUS + 1)) +#endif + #include #endif diff --git a/include/linux/memblock.h b/include/linux/memblock.h index 3ef3086ed52f..ecff64ff365d 100644 --- a/include/linux/memblock.h +++ b/include/linux/memblock.h @@ -29,9 +29,6 @@ extern unsigned long max_pfn; */ extern unsigned long long max_possible_pfn; -#define INIT_MEMBLOCK_REGIONS 128 -#define INIT_PHYSMEM_REGIONS 4 - /** * enum memblock_flags - definition of memory region attributes * @MEMBLOCK_NONE: no special request diff --git a/mm/memblock.c b/mm/memblock.c index f45a049532fe..74ac4f89018a 100644 --- a/mm/memblock.c +++ b/mm/memblock.c @@ -26,6 +26,13 @@ #include "internal.h" +#define INIT_MEMBLOCK_REGIONS 128 +#define INIT_PHYSMEM_REGIONS 4 + +#ifndef INIT_MEMBLOCK_RESERVED_REGIONS +# define INIT_MEMBLOCK_RESERVED_REGIONS INIT_MEMBLOCK_REGIONS +#endif + /** * DOC: memblock overview * @@ -92,7 +99,7 @@ unsigned long max_pfn; unsigned long long max_possible_pfn; static struct memblock_region memblock_memory_init_regions[INIT_MEMBLOCK_REGIONS] __initdata_memblock; -static struct memblock_region memblock_reserved_init_regions[INIT_MEMBLOCK_REGIONS] __initdata_memblock; +static struct memblock_region memblock_reserved_init_regions[INIT_MEMBLOCK_RESERVED_REGIONS] __initdata_memblock; #ifdef CONFIG_HAVE_MEMBLOCK_PHYS_MAP static struct memblock_region memblock_physmem_init_regions[INIT_PHYSMEM_REGIONS] __initdata_memblock; #endif @@ -105,7 +112,7 @@ struct memblock memblock __initdata_memblock = { .reserved.regions = memblock_reserved_init_regions, .reserved.cnt = 1, /* empty dummy entry */ - .reserved.max = INIT_MEMBLOCK_REGIONS, + .reserved.max = INIT_MEMBLOCK_RESERVED_REGIONS, .reserved.name = "reserved", #ifdef CONFIG_HAVE_MEMBLOCK_PHYS_MAP -- 2.20.1