From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DDB6C43381 for ; Tue, 26 Feb 2019 11:31:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 64000217F9 for ; Tue, 26 Feb 2019 11:31:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726018AbfBZLbR (ORCPT ); Tue, 26 Feb 2019 06:31:17 -0500 Received: from mga06.intel.com ([134.134.136.31]:44479 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725935AbfBZLbR (ORCPT ); Tue, 26 Feb 2019 06:31:17 -0500 X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Feb 2019 03:31:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,415,1544515200"; d="scan'208";a="120888933" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.157]) by orsmga008.jf.intel.com with SMTP; 26 Feb 2019 03:31:12 -0800 Received: by lahna (sSMTP sendmail emulation); Tue, 26 Feb 2019 13:31:11 +0200 Date: Tue, 26 Feb 2019 13:31:11 +0200 From: Mika Westerberg To: "Sverdlin, Alexander (Nokia - DE/Ulm)" Cc: "linux-mtd@lists.infradead.org" , Marek Vasut , Tudor Ambarus , David Woodhouse , Brian Norris , Boris Brezillon , Richard Weinberger , Bin Meng , "Porte, Romain (Nokia - FR/Paris-Saclay)" , "Fabreges, Pascal (Nokia - FR/Paris-Saclay)" , "stable@vger.kernel.org" Subject: Re: [PATCH] spi-nor: intel-spi: Avoid crossing 4K address boundary on read/write Message-ID: <20190226113111.GO2696@lahna.fi.intel.com> References: <20190226112334.401-1-alexander.sverdlin@nokia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190226112334.401-1-alexander.sverdlin@nokia.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.10.1 (2018-07-13) Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org On Tue, Feb 26, 2019 at 11:23:49AM +0000, Sverdlin, Alexander (Nokia - DE/Ulm) wrote: > It was observed that reads crossing 4K address boundary are failing. > > This limitation is mentioned in Intel documents: > > Intel(R) 9 Series Chipset Family Platform Controller Hub (PCH) Datasheet: > > "5.26.3 Flash Access > Program Register Access: > * Program Register Accesses are not allowed to cross a 4 KB boundary..." > > Enhanced Serial Peripheral Interface (eSPI) > Interface Base Specification (for Client and Server Platforms): > > "5.1.4 Address > For other memory transactions, the address may start or end at any byte > boundary. However, the address and payload length combination must not > cross the naturally aligned address boundary of the corresponding Maximum > Payload Size. It must not cross a 4 KB address boundary." > > Avoid this by splitting an operation crossing the boundary into two > operations. > > Cc: stable@vger.kernel.org > Reported-by: Romain Porte > Tested-by: Pascal Fabreges > Signed-off-by: Alexander Sverdlin > --- > drivers/mtd/spi-nor/intel-spi.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/mtd/spi-nor/intel-spi.c b/drivers/mtd/spi-nor/intel-spi.c > index af0a220..b83ea79 100644 > --- a/drivers/mtd/spi-nor/intel-spi.c > +++ b/drivers/mtd/spi-nor/intel-spi.c > @@ -632,6 +632,10 @@ static ssize_t intel_spi_read(struct spi_nor *nor, loff_t from, size_t len, > while (len > 0) { > block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ); > > + /* Read cannot cross 4K boundary */ > + if ((from ^ (from + block_size - 1)) & ~(SZ_4K - 1LL)) Don't we have existing macros in kernel.h that can be used here and below? > + block_size -= (from + block_size) & (SZ_4K - 1); > + > writel(from, ispi->base + FADDR); > > val = readl(ispi->base + HSFSTS_CTL); > @@ -685,6 +689,10 @@ static ssize_t intel_spi_write(struct spi_nor *nor, loff_t to, size_t len, > while (len > 0) { > block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ); > > + /* Write cannot cross 4K boundary */ > + if ((to ^ (to + block_size - 1)) & ~(SZ_4K - 1LL)) > + block_size -= (to + block_size) & (SZ_4K - 1); > + > writel(to, ispi->base + FADDR); > > val = readl(ispi->base + HSFSTS_CTL); > -- > 2.4.6