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[94.64.206.130]) by smtp.gmail.com with ESMTPSA id a82sm2427548wmf.11.2019.03.14.06.44.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Mar 2019 06:44:31 -0700 (PDT) Date: Thu, 14 Mar 2019 15:44:28 +0200 From: Ilias Apalodimas To: Christian Neubert Cc: Gregory CLEMENT , Stephen Boyd , Mike Turquette , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, "Rafael J. Wysocki" , Viresh Kumar , linux-pm@vger.kernel.org, Vincent Guittot , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, Antoine Tenart , =?iso-8859-1?Q?Miqu=E8l?= Raynal , Maxime Chevallier , stable@vger.kernel.org Subject: Re: [PATCH] clk: mvebu: armada-37xx-periph: Fix initialization for cpu clocks Message-ID: <20190314134428.GA24768@apalos> References: <20190313163558.6705-1-gregory.clement@bootlin.com> <20190314121541.GB19385@apalos> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org Hello Christian, > Hi, > > I assume you use the 1000 MHz firmware. This does also not work on my Rev 7 > board. But I'm pretty sure this is not a problem of the patches, because if > I take a newer kernel (4.19.20/27) without the patches it also does not > work. A kernel 4.19.17 does work for me. My opinion on that is that this is > another problem which does just occure now because now the cpu frequency > scaling is working with the right frequencies. I am not sure which firmware i am running, i did all my tests on 5.0.0 and changing between governors worked fine without the patches Regards /Ilias > > Ilias Apalodimas schrieb am Do., 14. März > 2019, 13:15: > > > Hi Gregory, > > > The clock parenting was not setup properly when DVFS was enabled. It was > > > expected that the same clock source was used with and without DVFS which > > > was not the case. > > > > > > This patch fixes this issue, allowing to make the cpufreq support work > > > when the CPU clocks source are not the default ones. > > > > > > Fixes: 92ce45fb875d ("cpufreq: Add DVFS support for Armada 37xx") > > > Cc: > > > Reported-by: Christian Neubert > > > Reported-by: Ilias Apalodimas > > > Signed-off-by: Gregory CLEMENT > > > --- > > > drivers/clk/mvebu/armada-37xx-periph.c | 11 +++++++++++ > > > 1 file changed, 11 insertions(+) > > > > > > diff --git a/drivers/clk/mvebu/armada-37xx-periph.c > > b/drivers/clk/mvebu/armada-37xx-periph.c > > > index 1f1cff428d78..26ed3c18a239 100644 > > > --- a/drivers/clk/mvebu/armada-37xx-periph.c > > > +++ b/drivers/clk/mvebu/armada-37xx-periph.c > > > @@ -671,6 +671,17 @@ static int armada_3700_add_composite_clk(const > > struct clk_periph_data *data, > > > map = syscon_regmap_lookup_by_compatible( > > > "marvell,armada-3700-nb-pm"); > > > pmcpu_clk->nb_pm_base = map; > > > + > > > + /* > > > + * Use the same parent when DVFS is enabled that the > > > + * default parent received at boot time. When this > > > + * function is called, DVFS is not enabled yet, so we > > > + * get the default parent and we can set the parent > > > + * for DVFS. > > > + */ > > > + if (clk_pm_cpu_set_parent(muxrate_hw, > > > + > > clk_pm_cpu_get_parent(muxrate_hw))) > > > + dev_warn(dev, "Failed to setup default parent > > clock for DVFS\n"); > > > } > > > > > > *hw = clk_hw_register_composite(dev, data->name, > > data->parent_names, > > > -- > > > 2.20.1 > > > > > Applied this and selected only > > > > CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y > > CONFIG_CPU_FREQ_GOV_PERFORMANCE=y > > CONFIG_CPU_FREQ_GOV_POWERSAVE=y > > > > After changing the governor from 'powersave' to 'performance' the board > > completely froze (i even lost access to the serial port) > > > > Cheers > > /Ilias > >