From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD91DC10F03 for ; Fri, 22 Mar 2019 12:23:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 917A12054F for ; Fri, 22 Mar 2019 12:23:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1553257421; bh=v9beN2M1QfezDpmeoiPpBzs6mrFBEIojI8P/Vg3EhiY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=GusLG7IAy2dmC5y1Yfz3tqQrUqmbTCcg0gu2KvrslhNTqitxj6BYhtboYp5KkL9SW JVkUjgOqI3WQjY8ko6xNhHkcMbELZZT+2OLQjUfioYOmuwsREC3Gx2e/VCLlBbr+QN ceAztli/3ahDpU993SRd8x4Ns0X9/nhEDuAQ93/E= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390789AbfCVMXl (ORCPT ); Fri, 22 Mar 2019 08:23:41 -0400 Received: from mail.kernel.org ([198.145.29.99]:35070 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390965AbfCVMXd (ORCPT ); Fri, 22 Mar 2019 08:23:33 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id EFF20218A1; Fri, 22 Mar 2019 12:23:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1553257412; bh=v9beN2M1QfezDpmeoiPpBzs6mrFBEIojI8P/Vg3EhiY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fdUBrVW5Gmv99EHHnqj9+pMmOaPOP9erv3qiAvd+i3UpsrMayfg2WKfTMwrxEv5Mm P+UYf7M1Lxa0v75IXun0NjIfCOh6f0mNQreiAoy3CeojbFe+vUJFrAcHrOh/Z1GpMb FBle4Wzwbk7gOm4I2GQo1M02xXusyq2w8CrQZexE= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Alex Deucher , Harry Wentland Subject: [PATCH 5.0 223/238] drm/amd/display: dont call dm_pp_ function from an fpu block Date: Fri, 22 Mar 2019 12:17:22 +0100 Message-Id: <20190322111311.493302162@linuxfoundation.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190322111258.383569278@linuxfoundation.org> References: <20190322111258.383569278@linuxfoundation.org> User-Agent: quilt/0.65 X-stable: review X-Patchwork-Hint: ignore MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org 5.0-stable review patch. If anyone has any objections, please let me know. ------------------ From: Harry Wentland commit 59d3191f14dc18881fec1172c7096b7863622803 upstream. Powerplay functions called from dm_pp_* functions tend to do a mutex_lock which isn't safe to do inside a kernel_fpu_begin/end block as those will disable/enable preemption. Rearrange the dm_pp_get_clock_levels_by_type_with_voltage calls to make sure they happen outside of kernel_fpu_begin/end. Cc: stable@vger.kernel.org Acked-by: Alex Deucher Signed-off-by: Harry Wentland Signed-off-by: Alex Deucher Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) --- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c +++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c @@ -1355,12 +1355,12 @@ void dcn_bw_update_from_pplib(struct dc struct dm_pp_clock_levels_with_voltage fclks = {0}, dcfclks = {0}; bool res; - kernel_fpu_begin(); - /* TODO: This is not the proper way to obtain fabric_and_dram_bandwidth, should be min(fclk, memclk) */ res = dm_pp_get_clock_levels_by_type_with_voltage( ctx, DM_PP_CLOCK_TYPE_FCLK, &fclks); + kernel_fpu_begin(); + if (res) res = verify_clock_values(&fclks); @@ -1379,9 +1379,13 @@ void dcn_bw_update_from_pplib(struct dc } else BREAK_TO_DEBUGGER(); + kernel_fpu_end(); + res = dm_pp_get_clock_levels_by_type_with_voltage( ctx, DM_PP_CLOCK_TYPE_DCFCLK, &dcfclks); + kernel_fpu_begin(); + if (res) res = verify_clock_values(&dcfclks);