From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C9B4C43381 for ; Fri, 29 Mar 2019 13:39:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5C4022173C for ; Fri, 29 Mar 2019 13:39:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1553866765; bh=83x8l1WFEWl9Iva/shfI0riQMRXWvBZlSu2zmrhS500=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=eSjb6x/c/+knmTi+fyH0Ah5Nz29lqqmHKyHYlc5An7Or3S1cg/I5DHRLRMiHjnaSw Bk65tmqbvr4pa75OmA60/jNenjVpliTaHs2JO7jmYjOxZ+4MhOXCcc7JIuXkNNrPVx jzVj2YjVgNuSesvuAbEqGgx2w0j+GDwk+kC2pDFc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729725AbfC2NiT (ORCPT ); Fri, 29 Mar 2019 09:38:19 -0400 Received: from mail.kernel.org ([198.145.29.99]:33632 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729636AbfC2NiT (ORCPT ); Fri, 29 Mar 2019 09:38:19 -0400 Received: from quaco.ghostprotocols.net (unknown [190.15.121.82]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 855982184E; Fri, 29 Mar 2019 13:38:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1553866698; bh=83x8l1WFEWl9Iva/shfI0riQMRXWvBZlSu2zmrhS500=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=E2ZOxxT8JVzPaihthTN6Wg1PG6bLqlLNv2QYCjm9/BrSulUBlr7X4hLs16wdSq/qz XQ6tGubs3Luj4tC2b5RMdayrkMzPvANgSF5TOiID6kM4gFShxV2FPOgB6fOTRnRydl 7r4Orp07+XOD1fJYRxz2I+na7xWwoqRk+V5NpIt8= From: Arnaldo Carvalho de Melo To: Ingo Molnar , Thomas Gleixner Cc: Jiri Olsa , Namhyung Kim , Clark Williams , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Adrian Hunter , Jiri Olsa , stable@vger.kernel.org, Arnaldo Carvalho de Melo Subject: [PATCH 02/13] perf intel-pt: Fix TSC slip Date: Fri, 29 Mar 2019 10:37:50 -0300 Message-Id: <20190329133801.21004-3-acme@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190329133801.21004-1-acme@kernel.org> References: <20190329133801.21004-1-acme@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Adrian Hunter A TSC packet can slip past MTC packets so that the timestamp appears to go backwards. One estimate is that can be up to about 40 CPU cycles, which is certainly less than 0x1000 TSC ticks, but accept slippage an order of magnitude more to be on the safe side. Signed-off-by: Adrian Hunter Cc: Jiri Olsa Cc: stable@vger.kernel.org Fixes: 79b58424b821c ("perf tools: Add Intel PT support for decoding MTC packets") Link: http://lkml.kernel.org/r/20190325135135.18348-1-adrian.hunter@intel.com Signed-off-by: Arnaldo Carvalho de Melo --- .../util/intel-pt-decoder/intel-pt-decoder.c | 20 ++++++++----------- 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c index 6e03db142091..872fab163585 100644 --- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c +++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c @@ -251,19 +251,15 @@ struct intel_pt_decoder *intel_pt_decoder_new(struct intel_pt_params *params) if (!(decoder->tsc_ctc_ratio_n % decoder->tsc_ctc_ratio_d)) decoder->tsc_ctc_mult = decoder->tsc_ctc_ratio_n / decoder->tsc_ctc_ratio_d; - - /* - * Allow for timestamps appearing to backwards because a TSC - * packet has slipped past a MTC packet, so allow 2 MTC ticks - * or ... - */ - decoder->tsc_slip = multdiv(2 << decoder->mtc_shift, - decoder->tsc_ctc_ratio_n, - decoder->tsc_ctc_ratio_d); } - /* ... or 0x100 paranoia */ - if (decoder->tsc_slip < 0x100) - decoder->tsc_slip = 0x100; + + /* + * A TSC packet can slip past MTC packets so that the timestamp appears + * to go backwards. One estimate is that can be up to about 40 CPU + * cycles, which is certainly less than 0x1000 TSC ticks, but accept + * slippage an order of magnitude more to be on the safe side. + */ + decoder->tsc_slip = 0x10000; intel_pt_log("timestamp: mtc_shift %u\n", decoder->mtc_shift); intel_pt_log("timestamp: tsc_ctc_ratio_n %u\n", decoder->tsc_ctc_ratio_n); -- 2.20.1