From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5CCAC4360F for ; Mon, 1 Apr 2019 17:51:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9607920830 for ; Mon, 1 Apr 2019 17:51:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1554141060; bh=pyB+b8z14ekwPXBlGSLv7QKozK6mKz9qdd+aOQdrRKw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=2Ml6i7ZAaFm4q5RmuesdCmw01HzJ+5Z5zxvVadcJNt5eGzdMmPZzg5wB/XJkpVnMp Y8IMmsiYx+rJplmgvTaJ/3nqC718Vb8hPPmwAPEwd89d+s/3P9sA35vKssfkwitE9w g6pt1sw/hJs5o5LAtKAMhRzndD1N6S43VkpNezsc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732078AbfDAR2a (ORCPT ); Mon, 1 Apr 2019 13:28:30 -0400 Received: from mail.kernel.org ([198.145.29.99]:34408 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732787AbfDAR23 (ORCPT ); Mon, 1 Apr 2019 13:28:29 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D3D2020856; Mon, 1 Apr 2019 17:28:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1554139709; bh=pyB+b8z14ekwPXBlGSLv7QKozK6mKz9qdd+aOQdrRKw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SSP0+sh3GS0jAtfmfa4Su2r7dUmtADQdloecb9I0uasrzsLRFy2q7sFyHe1mUNu22 rztMDnBlr0fYdkAX6OCS59mrn8WWP/7KLZ84gIxfe6IEKZ87dYuuIklK/dB+FlPz10 Y4WUwUcUHvOSspf4N4uo+sEXQDKfUCgi1KhmbJq8= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Adrian Hunter , Jiri Olsa , Arnaldo Carvalho de Melo Subject: [PATCH 4.9 48/56] perf intel-pt: Fix TSC slip Date: Mon, 1 Apr 2019 19:03:04 +0200 Message-Id: <20190401170106.516865711@linuxfoundation.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190401170103.398401360@linuxfoundation.org> References: <20190401170103.398401360@linuxfoundation.org> User-Agent: quilt/0.65 X-stable: review X-Patchwork-Hint: ignore MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org 4.9-stable review patch. If anyone has any objections, please let me know. ------------------ From: Adrian Hunter commit f3b4e06b3bda759afd042d3d5fa86bea8f1fe278 upstream. A TSC packet can slip past MTC packets so that the timestamp appears to go backwards. One estimate is that can be up to about 40 CPU cycles, which is certainly less than 0x1000 TSC ticks, but accept slippage an order of magnitude more to be on the safe side. Signed-off-by: Adrian Hunter Cc: Jiri Olsa Cc: stable@vger.kernel.org Fixes: 79b58424b821c ("perf tools: Add Intel PT support for decoding MTC packets") Link: http://lkml.kernel.org/r/20190325135135.18348-1-adrian.hunter@intel.com Signed-off-by: Arnaldo Carvalho de Melo Signed-off-by: Greg Kroah-Hartman --- tools/perf/util/intel-pt-decoder/intel-pt-decoder.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) --- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c +++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c @@ -240,19 +240,15 @@ struct intel_pt_decoder *intel_pt_decode if (!(decoder->tsc_ctc_ratio_n % decoder->tsc_ctc_ratio_d)) decoder->tsc_ctc_mult = decoder->tsc_ctc_ratio_n / decoder->tsc_ctc_ratio_d; - - /* - * Allow for timestamps appearing to backwards because a TSC - * packet has slipped past a MTC packet, so allow 2 MTC ticks - * or ... - */ - decoder->tsc_slip = multdiv(2 << decoder->mtc_shift, - decoder->tsc_ctc_ratio_n, - decoder->tsc_ctc_ratio_d); } - /* ... or 0x100 paranoia */ - if (decoder->tsc_slip < 0x100) - decoder->tsc_slip = 0x100; + + /* + * A TSC packet can slip past MTC packets so that the timestamp appears + * to go backwards. One estimate is that can be up to about 40 CPU + * cycles, which is certainly less than 0x1000 TSC ticks, but accept + * slippage an order of magnitude more to be on the safe side. + */ + decoder->tsc_slip = 0x10000; intel_pt_log("timestamp: mtc_shift %u\n", decoder->mtc_shift); intel_pt_log("timestamp: tsc_ctc_ratio_n %u\n", decoder->tsc_ctc_ratio_n);