From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30558C282DE for ; Mon, 8 Apr 2019 08:07:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 08ED2208E3 for ; Mon, 8 Apr 2019 08:07:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726532AbfDHIHw convert rfc822-to-8bit (ORCPT ); Mon, 8 Apr 2019 04:07:52 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:44330 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725877AbfDHIHw (ORCPT ); Mon, 8 Apr 2019 04:07:52 -0400 Received: from localhost (unknown [IPv6:2a01:e0a:2c:6930:5cf4:84a1:2763:fe0d]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: bbrezillon) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 87A8326068F; Mon, 8 Apr 2019 09:07:50 +0100 (BST) Date: Mon, 8 Apr 2019 10:07:47 +0200 From: Boris Brezillon To: Miquel Raynal Cc: Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , Tudor Ambarus , Vignesh Raghavendra , , stable@vger.kernel.org, Daniel Mack Subject: Re: [PATCH] mtd: rawnand: marvell: Ensure the ND_RUN bit is reset Message-ID: <20190408100747.7dc8412e@collabora.com> In-Reply-To: <20190407193401.7983-1-miquel.raynal@bootlin.com> References: <20190407193401.7983-1-miquel.raynal@bootlin.com> Organization: Collabora X-Mailer: Claws Mail 3.17.3 (GTK+ 2.24.32; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org On Sun, 7 Apr 2019 21:34:01 +0200 Miquel Raynal wrote: > Since the migration of the driver to stop using the legacy > ->select_chip() hook, there is nothing deselecting the target anymore, > thus the selection is not forced at the next access. Ensure the ND_RUN > bit is always in a clean state. > > Cc: Daniel Mack > Cc: stable@vger.kernel.org > Fixes: b25251414f6e00 ("mtd: rawnand: marvell: Stop implementing ->select_chip()") > Suggested-by: Boris Brezillon > Signed-off-by: Miquel Raynal > --- > > Hi Daniel, could you please test this version of the fix? > > Thanks, > Miquèl > > > drivers/mtd/nand/raw/marvell_nand.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c > index f38e5c1b87e4..a7d7f17d8682 100644 > --- a/drivers/mtd/nand/raw/marvell_nand.c > +++ b/drivers/mtd/nand/raw/marvell_nand.c > @@ -722,12 +722,6 @@ static void marvell_nfc_select_target(struct nand_chip *chip, > struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); > u32 ndcr_generic; > > - if (chip == nfc->selected_chip && die_nr == marvell_nand->selected_die) > - return; > - > - writel_relaxed(marvell_nand->ndtr0, nfc->regs + NDTR0); > - writel_relaxed(marvell_nand->ndtr1, nfc->regs + NDTR1); > - > /* > * Reset the NDCR register to a clean state for this particular chip, > * also clear ND_RUN bit. > @@ -736,6 +730,12 @@ static void marvell_nfc_select_target(struct nand_chip *chip, > NDCR_GENERIC_FIELDS_MASK & ~NDCR_ND_RUN; > writel_relaxed(ndcr_generic | marvell_nand->ndcr, nfc->regs + NDCR); > > + if (chip == nfc->selected_chip && die_nr == marvell_nand->selected_die) > + return; > + > + writel_relaxed(marvell_nand->ndtr0, nfc->regs + NDTR0); > + writel_relaxed(marvell_nand->ndtr1, nfc->regs + NDTR1); > + > /* Also reset the interrupt status register */ > marvell_nfc_clear_int(nfc, NDCR_ALL_INT); I think this should also be moved before the if (chip == nfc->selected_chip && die_nr == marvell_nand->selected_die) check.