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* [PATCH] mtd: rawnand: marvell: Ensure the ND_RUN bit is reset
@ 2019-04-07 19:34 Miquel Raynal
  2019-04-08  8:07 ` Boris Brezillon
  0 siblings, 1 reply; 3+ messages in thread
From: Miquel Raynal @ 2019-04-07 19:34 UTC (permalink / raw)
  To: Richard Weinberger, David Woodhouse, Brian Norris, Marek Vasut,
	Tudor Ambarus, Vignesh Raghavendra, linux-mtd
  Cc: Daniel Mack, Miquel Raynal, stable

Since the migration of the driver to stop using the legacy
->select_chip() hook, there is nothing deselecting the target anymore,
thus the selection is not forced at the next access. Ensure the ND_RUN
bit is always in a clean state.

Cc: Daniel Mack <daniel@zonque.org>
Cc: stable@vger.kernel.org
Fixes: b25251414f6e00 ("mtd: rawnand: marvell: Stop implementing ->select_chip()")
Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---

Hi Daniel, could you please test this version of the fix?

Thanks,
Miquèl


 drivers/mtd/nand/raw/marvell_nand.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c
index f38e5c1b87e4..a7d7f17d8682 100644
--- a/drivers/mtd/nand/raw/marvell_nand.c
+++ b/drivers/mtd/nand/raw/marvell_nand.c
@@ -722,12 +722,6 @@ static void marvell_nfc_select_target(struct nand_chip *chip,
 	struct marvell_nfc *nfc = to_marvell_nfc(chip->controller);
 	u32 ndcr_generic;
 
-	if (chip == nfc->selected_chip && die_nr == marvell_nand->selected_die)
-		return;
-
-	writel_relaxed(marvell_nand->ndtr0, nfc->regs + NDTR0);
-	writel_relaxed(marvell_nand->ndtr1, nfc->regs + NDTR1);
-
 	/*
 	 * Reset the NDCR register to a clean state for this particular chip,
 	 * also clear ND_RUN bit.
@@ -736,6 +730,12 @@ static void marvell_nfc_select_target(struct nand_chip *chip,
 		       NDCR_GENERIC_FIELDS_MASK & ~NDCR_ND_RUN;
 	writel_relaxed(ndcr_generic | marvell_nand->ndcr, nfc->regs + NDCR);
 
+	if (chip == nfc->selected_chip && die_nr == marvell_nand->selected_die)
+		return;
+
+	writel_relaxed(marvell_nand->ndtr0, nfc->regs + NDTR0);
+	writel_relaxed(marvell_nand->ndtr1, nfc->regs + NDTR1);
+
 	/* Also reset the interrupt status register */
 	marvell_nfc_clear_int(nfc, NDCR_ALL_INT);
 
-- 
2.19.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2019-04-08  8:11 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2019-04-07 19:34 [PATCH] mtd: rawnand: marvell: Ensure the ND_RUN bit is reset Miquel Raynal
2019-04-08  8:07 ` Boris Brezillon
2019-04-08  8:11   ` Miquel Raynal

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