From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7818C282CE for ; Mon, 8 Apr 2019 08:11:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8DBA720883 for ; Mon, 8 Apr 2019 08:11:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726352AbfDHILH convert rfc822-to-8bit (ORCPT ); Mon, 8 Apr 2019 04:11:07 -0400 Received: from relay11.mail.gandi.net ([217.70.178.231]:57463 "EHLO relay11.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725877AbfDHILH (ORCPT ); Mon, 8 Apr 2019 04:11:07 -0400 Received: from xps13 (aaubervilliers-681-1-89-125.w90-88.abo.wanadoo.fr [90.88.30.125]) (Authenticated sender: miquel.raynal@bootlin.com) by relay11.mail.gandi.net (Postfix) with ESMTPSA id 92E45100003; Mon, 8 Apr 2019 08:11:03 +0000 (UTC) Date: Mon, 8 Apr 2019 10:11:02 +0200 From: Miquel Raynal To: Boris Brezillon Cc: Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , Tudor Ambarus , Vignesh Raghavendra , , stable@vger.kernel.org, Daniel Mack Subject: Re: [PATCH] mtd: rawnand: marvell: Ensure the ND_RUN bit is reset Message-ID: <20190408101102.782427c0@xps13> In-Reply-To: <20190408100747.7dc8412e@collabora.com> References: <20190407193401.7983-1-miquel.raynal@bootlin.com> <20190408100747.7dc8412e@collabora.com> Organization: Bootlin X-Mailer: Claws Mail 3.17.1 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org Hi Boris, Boris Brezillon wrote on Mon, 8 Apr 2019 10:07:47 +0200: > On Sun, 7 Apr 2019 21:34:01 +0200 > Miquel Raynal wrote: > > > Since the migration of the driver to stop using the legacy > > ->select_chip() hook, there is nothing deselecting the target anymore, > > thus the selection is not forced at the next access. Ensure the ND_RUN > > bit is always in a clean state. > > > > Cc: Daniel Mack > > Cc: stable@vger.kernel.org > > Fixes: b25251414f6e00 ("mtd: rawnand: marvell: Stop implementing ->select_chip()") > > Suggested-by: Boris Brezillon > > Signed-off-by: Miquel Raynal > > --- > > > > Hi Daniel, could you please test this version of the fix? > > > > Thanks, > > Miquèl > > > > > > drivers/mtd/nand/raw/marvell_nand.c | 12 ++++++------ > > 1 file changed, 6 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c > > index f38e5c1b87e4..a7d7f17d8682 100644 > > --- a/drivers/mtd/nand/raw/marvell_nand.c > > +++ b/drivers/mtd/nand/raw/marvell_nand.c > > @@ -722,12 +722,6 @@ static void marvell_nfc_select_target(struct nand_chip *chip, > > struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); > > u32 ndcr_generic; > > > > - if (chip == nfc->selected_chip && die_nr == marvell_nand->selected_die) > > - return; > > - > > - writel_relaxed(marvell_nand->ndtr0, nfc->regs + NDTR0); > > - writel_relaxed(marvell_nand->ndtr1, nfc->regs + NDTR1); > > - > > /* > > * Reset the NDCR register to a clean state for this particular chip, > > * also clear ND_RUN bit. > > @@ -736,6 +730,12 @@ static void marvell_nfc_select_target(struct nand_chip *chip, > > NDCR_GENERIC_FIELDS_MASK & ~NDCR_ND_RUN; > > writel_relaxed(ndcr_generic | marvell_nand->ndcr, nfc->regs + NDCR); > > > > + if (chip == nfc->selected_chip && die_nr == marvell_nand->selected_die) > > + return; > > + > > + writel_relaxed(marvell_nand->ndtr0, nfc->regs + NDTR0); > > + writel_relaxed(marvell_nand->ndtr1, nfc->regs + NDTR1); > > + > > /* Also reset the interrupt status register */ > > marvell_nfc_clear_int(nfc, NDCR_ALL_INT); > > I think this should also be moved before the > > if (chip == nfc->selected_chip && > die_nr == marvell_nand->selected_die) > > check. Yes, I think it is not needed, I wanted Daniel to test. But maybe it is better to ensure interrupts are always cleared anyway. I'll send a v2 then. Thanks, Miquèl