From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS, T_DKIMWL_WL_HIGH,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 798ECC04A6B for ; Mon, 6 May 2019 15:10:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4DA392054F for ; Mon, 6 May 2019 15:10:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1557155436; bh=eqIMyI2to114pYMDTN8IOgOzj1heKa0eEbStpxGTRpE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=Rx+xdEe8NL8wy8fHseCVg5yZPHtTu2SMswDXLxGTWcNpnW3UjfUSAK9vGhCzyGJ5V g+/nbbJ653ucP+WyXEZ3LhW+A7e4Bm7gsrUVRIGEU3yxeapNZCifHV0aRrJOWPiZip 61F/BhxLJFJqkXHa+Dfv/Z0LyU/Z4Qu65kqTIY1s= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726569AbfEFOeU (ORCPT ); Mon, 6 May 2019 10:34:20 -0400 Received: from mail.kernel.org ([198.145.29.99]:53914 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726547AbfEFOeU (ORCPT ); Mon, 6 May 2019 10:34:20 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id BD6C021019; Mon, 6 May 2019 14:34:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1557153259; bh=eqIMyI2to114pYMDTN8IOgOzj1heKa0eEbStpxGTRpE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ox1fIonzaf3O7yY8wWsRhJ48jPxJrrginBkF34nsX8P3GeApYb4wQOz6jRNLJPBv+ ll4tc6sP6SpQACVUQWhyptuAoya5agNWs7XSAaGsE7E7WOoneNb7IFj10lYXUZFYLh EeMDmJrLlEWxsBkohvvra6/Cb9uonFV50GwxkM8o= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Daniel Mack , Boris Brezillon , Miquel Raynal , Richard Weinberger Subject: [PATCH 5.0 006/122] mtd: rawnand: marvell: Clean the controller state before each operation Date: Mon, 6 May 2019 16:31:04 +0200 Message-Id: <20190506143055.288319220@linuxfoundation.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190506143054.670334917@linuxfoundation.org> References: <20190506143054.670334917@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Miquel Raynal commit 9a8f612ca0d6a436e6471c9bed516d34a2cc626f upstream. Since the migration of the driver to stop using the legacy ->select_chip() hook, there is nothing deselecting the target anymore, thus the selection is not forced at the next access. Ensure the ND_RUN bit and the interrupts are always in a clean state. Cc: Daniel Mack Cc: stable@vger.kernel.org Fixes: b25251414f6e00 ("mtd: rawnand: marvell: Stop implementing ->select_chip()") Suggested-by: Boris Brezillon Signed-off-by: Miquel Raynal Tested-by: Daniel Mack Reviewed-by: Boris Brezillon Signed-off-by: Richard Weinberger Signed-off-by: Greg Kroah-Hartman --- drivers/mtd/nand/raw/marvell_nand.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) --- a/drivers/mtd/nand/raw/marvell_nand.c +++ b/drivers/mtd/nand/raw/marvell_nand.c @@ -722,12 +722,6 @@ static void marvell_nfc_select_target(st struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); u32 ndcr_generic; - if (chip == nfc->selected_chip && die_nr == marvell_nand->selected_die) - return; - - writel_relaxed(marvell_nand->ndtr0, nfc->regs + NDTR0); - writel_relaxed(marvell_nand->ndtr1, nfc->regs + NDTR1); - /* * Reset the NDCR register to a clean state for this particular chip, * also clear ND_RUN bit. @@ -739,6 +733,12 @@ static void marvell_nfc_select_target(st /* Also reset the interrupt status register */ marvell_nfc_clear_int(nfc, NDCR_ALL_INT); + if (chip == nfc->selected_chip && die_nr == marvell_nand->selected_die) + return; + + writel_relaxed(marvell_nand->ndtr0, nfc->regs + NDTR0); + writel_relaxed(marvell_nand->ndtr1, nfc->regs + NDTR1); + nfc->selected_chip = chip; marvell_nand->selected_die = die_nr; }