From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,T_DKIMWL_WL_HIGH,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18B62C2BCA1 for ; Fri, 7 Jun 2019 15:52:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D833020657 for ; Fri, 7 Jun 2019 15:52:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1559922771; bh=T5UWRjnalZcGaFS0R5WgwhNuvjhuk40UyEc19GOolAw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=G1brWoWSndWV1RCBloax3DPRM68sNQ/y1YWCBfnHuiB4uQxOtmtZweMk058s46SMU 9f7YKDW8EgaNBmoX5fHMG0/6neaBl54b/HNVmRMEk7O12B+RFDLan7iaMSx7qRtDcq MCXrMAso6PNU/nUb2EYtDRxda0u8q4eq7KdGg/oQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730169AbfFGPwq (ORCPT ); Fri, 7 Jun 2019 11:52:46 -0400 Received: from mail.kernel.org ([198.145.29.99]:34448 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730217AbfFGPsz (ORCPT ); Fri, 7 Jun 2019 11:48:55 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2E0F020657; Fri, 7 Jun 2019 15:48:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1559922534; bh=T5UWRjnalZcGaFS0R5WgwhNuvjhuk40UyEc19GOolAw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bXNzD9eZmGa8RIyKOYoBYnJ7/jiMJYyZYQRENxwp3INJxeiJ4YoHGMQGq8Li8TpGC 5zrpl5QorCTUPjOKH/efO1iinISAHc2QQmPKZOyCVzwTXqQS+BGDUBtII9nN0nKuYU n5AVbbeyN2/Krpb+Wxo5WmQjvxzhNsmYwUHhPdGg= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Joe Burmeister Subject: [PATCH 5.1 47/85] tty: max310x: Fix external crystal register setup Date: Fri, 7 Jun 2019 17:39:32 +0200 Message-Id: <20190607153854.824020797@linuxfoundation.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190607153849.101321647@linuxfoundation.org> References: <20190607153849.101321647@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Joe Burmeister commit 5d24f455c182d5116dd5db8e1dc501115ecc9c2c upstream. The datasheet states: Bit 4: ClockEnSet the ClockEn bit high to enable an external clocking (crystal or clock generator at XIN). Set the ClockEn bit to 0 to disable clocking Bit 1: CrystalEnSet the CrystalEn bit high to enable the crystal oscillator. When using an external clock source at XIN, CrystalEn must be set low. The bit 4, MAX310X_CLKSRC_EXTCLK_BIT, should be set and was not. This was required to make the MAX3107 with an external crystal on our board able to send or receive data. Signed-off-by: Joe Burmeister Cc: stable Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/max310x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/tty/serial/max310x.c +++ b/drivers/tty/serial/max310x.c @@ -581,7 +581,7 @@ static int max310x_set_ref_clk(struct de } /* Configure clock source */ - clksrc = xtal ? MAX310X_CLKSRC_CRYST_BIT : MAX310X_CLKSRC_EXTCLK_BIT; + clksrc = MAX310X_CLKSRC_EXTCLK_BIT | (xtal ? MAX310X_CLKSRC_CRYST_BIT : 0); /* Configure PLL */ if (pllcfg) {