From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9936C31E5B for ; Mon, 17 Jun 2019 21:35:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 833AF2063F for ; Mon, 17 Jun 2019 21:35:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1560807330; bh=zvYzAelTsaiCdKRjDnzmqvkcpsP0V6Ofx+NoPmbZhFg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=zcC+n3VLmzg7qhkmk7qal1IWsROAm8zMcneY62tSUlsq2R9hTs6Lp7ipGS011p77O D7ECA4bjJ23lEqFLqMh7+V5mC9igDfn4MSv/txTMyoQ1ThU229gpjQwDSgLDoHN1k3 QcUdN3LB4+uxLcqwrI2Z6KS9kKt2uKOgrE7wIsB0= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729603AbfFQVWu (ORCPT ); Mon, 17 Jun 2019 17:22:50 -0400 Received: from mail.kernel.org ([198.145.29.99]:47634 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729599AbfFQVWt (ORCPT ); Mon, 17 Jun 2019 17:22:49 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3D268206B7; Mon, 17 Jun 2019 21:22:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1560806568; bh=zvYzAelTsaiCdKRjDnzmqvkcpsP0V6Ofx+NoPmbZhFg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WoecNCLqvi0kQG0WepWUT5/Ogu6LTpzav+ESBSVFjv7Kadg47NPeRuHd23GiZEJvr G94f9PADu+23oWyHMVuc9Xsr29QxCl8adZeLipmNU+lmp0zfE1FTynj57gsupi6QQ6 DFtiAYwknV/7VAwIsvWjtCmquQQI2zCHB6Az64w8= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Nadav Amit , Paolo Bonzini , Sasha Levin Subject: [PATCH 5.1 090/115] KVM: x86/pmu: do not mask the value that is written to fixed PMUs Date: Mon, 17 Jun 2019 23:09:50 +0200 Message-Id: <20190617210804.539178058@linuxfoundation.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190617210759.929316339@linuxfoundation.org> References: <20190617210759.929316339@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org [ Upstream commit 2924b52117b2812e9633d5ea337333299166d373 ] According to the SDM, for MSR_IA32_PERFCTR0/1 "the lower-order 32 bits of each MSR may be written with any value, and the high-order 8 bits are sign-extended according to the value of bit 31", but the fixed counters in real hardware are limited to the width of the fixed counters ("bits beyond the width of the fixed-function counter are reserved and must be written as zeros"). Fix KVM to do the same. Reported-by: Nadav Amit Signed-off-by: Paolo Bonzini Signed-off-by: Sasha Levin --- arch/x86/kvm/vmx/pmu_intel.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index ad7ea81fbfbf..c3f103e2b08e 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -240,11 +240,14 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) } break; default: - if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) || - (pmc = get_fixed_pmc(pmu, msr))) { - if (!msr_info->host_initiated) - data = (s64)(s32)data; - pmc->counter += data - pmc_read_counter(pmc); + if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0))) { + if (msr_info->host_initiated) + pmc->counter = data; + else + pmc->counter = (s32)data; + return 0; + } else if ((pmc = get_fixed_pmc(pmu, msr))) { + pmc->counter = data; return 0; } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) { if (data == pmc->eventsel) -- 2.20.1