From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19894C43613 for ; Thu, 20 Jun 2019 18:31:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E91A820675 for ; Thu, 20 Jun 2019 18:31:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1561055511; bh=/0WH4uHs/A+ra6mDSAaIyKeRR9oPoZo77d2r4bA8WFg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=2LBQas1tFt4/mPq8KnuQIzz9EnjhZ8/7QIXjwPFDVq1Fdxb38PEu8W4e8W1QN8J7x AG4KowrdGqXYpVJpzjMDSK5EEOQdN57G6rIynDm4MFDlpAjWCspd5+6+tvkBaTYQQR R9UUVUVoJT4AExl/jjUQ54OWB0A+PK2lBr23ycVk= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726441AbfFTR7I (ORCPT ); Thu, 20 Jun 2019 13:59:08 -0400 Received: from mail.kernel.org ([198.145.29.99]:46296 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726405AbfFTR7H (ORCPT ); Thu, 20 Jun 2019 13:59:07 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 104112084A; Thu, 20 Jun 2019 17:59:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1561053547; bh=/0WH4uHs/A+ra6mDSAaIyKeRR9oPoZo77d2r4bA8WFg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lteTcv3x/Js+EsD/AjXuoET0hJtjahchDc+BjqTKP6p1/J+cyZE/9kzMRP0fI30Mz +eDKbYO4nYOIi+d7AtSCl2Z6nVfgqUlqE8ua9Z80Pw5HbWV/CU7bP1bzMCtEheU8y1 JUTGsKcLzn1KE32vG+mixxzlk2pHP/qy+RgWmWnE= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Andrey Smirnov , Lucas Stach , "Angus Ainslie (Purism)" , Chris Healy , Fabio Estevam , Shawn Guo , linux-arm-kernel@lists.infradead.org, Adam Ford , Sasha Levin Subject: [PATCH 4.4 26/84] ARM: dts: imx6qdl: Specify IMX6QDL_CLK_IPG as "ipg" clock to SDMA Date: Thu, 20 Jun 2019 19:56:23 +0200 Message-Id: <20190620174341.592434056@linuxfoundation.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190620174337.538228162@linuxfoundation.org> References: <20190620174337.538228162@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org [ Upstream commit b14c872eebc501b9640b04f4a152df51d6eaf2fc ] Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb" clock to determine if it needs to configure the IP block as operating at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both clocks as IMX6QDL_CLK_SDMA results in driver incorrectly thinking that ratio is 1:1 which results in broken SDMA funtionality(this at least breaks RAVE SP serdev driver on RDU2). Fix the code to specify IMX6QDL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting incorrect clock ratio. Signed-off-by: Andrey Smirnov Reviewed-by: Lucas Stach Cc: Angus Ainslie (Purism) Cc: Chris Healy Cc: Lucas Stach Cc: Fabio Estevam Cc: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Tested-by: Adam Ford Signed-off-by: Shawn Guo Signed-off-by: Sasha Levin --- arch/arm/boot/dts/imx6qdl.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index e6af41c4bbc1..3992b8ea1c48 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -853,7 +853,7 @@ compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; reg = <0x020ec000 0x4000>; interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6QDL_CLK_SDMA>, + clocks = <&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_SDMA>; clock-names = "ipg", "ahb"; #dma-cells = <3>; -- 2.20.1