* Re: [PATCH] drm/i915/gvt: fix incorrect cache entry for guest page mapping
2019-07-17 15:56 Xiaolin Zhang
@ 2019-07-17 7:55 ` Greg KH
2019-07-17 8:08 ` Zhang, Xiaolin
0 siblings, 1 reply; 5+ messages in thread
From: Greg KH @ 2019-07-17 7:55 UTC (permalink / raw)
To: Xiaolin Zhang; +Cc: intel-gvt-dev, stable
On Wed, Jul 17, 2019 at 11:56:27PM +0800, Xiaolin Zhang wrote:
> GPU hang observed during the guest OCL conformance test which is caused
> by THP GTT feature used durning the test.
>
> It was observed the same GFN with different size (4K and 2M) requested
> from the guest in GVT. So during the guest page dma map stage, it is
> required to unmap first with orginal size and then remap again with
> requested size.
>
> Fixes: b901b252b6cf ("drm/i915/gvt: Add 2M huge gtt support")
> Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
> ---
> drivers/gpu/drm/i915/gvt/kvmgt.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
<formletter>
This is not the correct way to submit patches for inclusion in the
stable kernel tree. Please read:
https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
for how to do this properly.
</formletter>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915/gvt: fix incorrect cache entry for guest page mapping
2019-07-17 7:55 ` Greg KH
@ 2019-07-17 8:08 ` Zhang, Xiaolin
0 siblings, 0 replies; 5+ messages in thread
From: Zhang, Xiaolin @ 2019-07-17 8:08 UTC (permalink / raw)
To: Greg KH; +Cc: intel-gvt-dev@lists.freedesktop.org, stable@vger.kernel.org
On 07/17/2019 03:55 PM, Greg KH wrote:
> On Wed, Jul 17, 2019 at 11:56:27PM +0800, Xiaolin Zhang wrote:
>> GPU hang observed during the guest OCL conformance test which is caused
>> by THP GTT feature used durning the test.
>>
>> It was observed the same GFN with different size (4K and 2M) requested
>> from the guest in GVT. So during the guest page dma map stage, it is
>> required to unmap first with orginal size and then remap again with
>> requested size.
>>
>> Fixes: b901b252b6cf ("drm/i915/gvt: Add 2M huge gtt support")
>> Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
>> ---
>> drivers/gpu/drm/i915/gvt/kvmgt.c | 12 ++++++++++++
>> 1 file changed, 12 insertions(+)
> <formletter>
>
> This is not the correct way to submit patches for inclusion in the
> stable kernel tree. Please read:
> https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
> for how to do this properly.
>
> </formletter>
>
Greg, Thanks great information to point out this I am not fully aware.
will resend to correct this.
-Xiaolin
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH] drm/i915/gvt: fix incorrect cache entry for guest page mapping
@ 2019-07-17 15:56 Xiaolin Zhang
2019-07-17 7:55 ` Greg KH
0 siblings, 1 reply; 5+ messages in thread
From: Xiaolin Zhang @ 2019-07-17 15:56 UTC (permalink / raw)
To: intel-gvt-dev; +Cc: stable, Xiaolin Zhang
GPU hang observed during the guest OCL conformance test which is caused
by THP GTT feature used durning the test.
It was observed the same GFN with different size (4K and 2M) requested
from the guest in GVT. So during the guest page dma map stage, it is
required to unmap first with orginal size and then remap again with
requested size.
Fixes: b901b252b6cf ("drm/i915/gvt: Add 2M huge gtt support")
Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
---
drivers/gpu/drm/i915/gvt/kvmgt.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c
index a68addf..4a7cf86 100644
--- a/drivers/gpu/drm/i915/gvt/kvmgt.c
+++ b/drivers/gpu/drm/i915/gvt/kvmgt.c
@@ -1911,6 +1911,18 @@ static int kvmgt_dma_map_guest_page(unsigned long handle, unsigned long gfn,
ret = __gvt_cache_add(info->vgpu, gfn, *dma_addr, size);
if (ret)
goto err_unmap;
+ } else if (entry->size != size) {
+ /* the same gfn with different size: unmap and re-map */
+ gvt_dma_unmap_page(vgpu, gfn, entry->dma_addr, entry->size);
+ __gvt_cache_remove_entry(vgpu, entry);
+
+ ret = gvt_dma_map_page(vgpu, gfn, dma_addr, size);
+ if (ret)
+ goto err_unlock;
+
+ ret = __gvt_cache_add(info->vgpu, gfn, *dma_addr, size);
+ if (ret)
+ goto err_unmap;
} else {
kref_get(&entry->ref);
*dma_addr = entry->dma_addr;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH] drm/i915/gvt: fix incorrect cache entry for guest page mapping
@ 2019-07-17 17:10 Xiaolin Zhang
2019-07-18 3:05 ` Zhenyu Wang
0 siblings, 1 reply; 5+ messages in thread
From: Xiaolin Zhang @ 2019-07-17 17:10 UTC (permalink / raw)
To: intel-gvt-dev; +Cc: Xiaolin Zhang, stable
GPU hang observed during the guest OCL conformance test which is caused
by THP GTT feature used durning the test.
It was observed the same GFN with different size (4K and 2M) requested
from the guest in GVT. So during the guest page dma map stage, it is
required to unmap first with orginal size and then remap again with
requested size.
Fixes: b901b252b6cf ("drm/i915/gvt: Add 2M huge gtt support")
Cc: stable@vger.kernel.org
Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
---
drivers/gpu/drm/i915/gvt/kvmgt.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c
index a68addf..4a7cf86 100644
--- a/drivers/gpu/drm/i915/gvt/kvmgt.c
+++ b/drivers/gpu/drm/i915/gvt/kvmgt.c
@@ -1911,6 +1911,18 @@ static int kvmgt_dma_map_guest_page(unsigned long handle, unsigned long gfn,
ret = __gvt_cache_add(info->vgpu, gfn, *dma_addr, size);
if (ret)
goto err_unmap;
+ } else if (entry->size != size) {
+ /* the same gfn with different size: unmap and re-map */
+ gvt_dma_unmap_page(vgpu, gfn, entry->dma_addr, entry->size);
+ __gvt_cache_remove_entry(vgpu, entry);
+
+ ret = gvt_dma_map_page(vgpu, gfn, dma_addr, size);
+ if (ret)
+ goto err_unlock;
+
+ ret = __gvt_cache_add(info->vgpu, gfn, *dma_addr, size);
+ if (ret)
+ goto err_unmap;
} else {
kref_get(&entry->ref);
*dma_addr = entry->dma_addr;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915/gvt: fix incorrect cache entry for guest page mapping
2019-07-17 17:10 [PATCH] drm/i915/gvt: fix incorrect cache entry for guest page mapping Xiaolin Zhang
@ 2019-07-18 3:05 ` Zhenyu Wang
0 siblings, 0 replies; 5+ messages in thread
From: Zhenyu Wang @ 2019-07-18 3:05 UTC (permalink / raw)
To: Xiaolin Zhang; +Cc: intel-gvt-dev, stable
[-- Attachment #1: Type: text/plain, Size: 1911 bytes --]
On 2019.07.18 01:10:24 +0800, Xiaolin Zhang wrote:
> GPU hang observed during the guest OCL conformance test which is caused
> by THP GTT feature used durning the test.
>
> It was observed the same GFN with different size (4K and 2M) requested
> from the guest in GVT. So during the guest page dma map stage, it is
> required to unmap first with orginal size and then remap again with
> requested size.
>
> Fixes: b901b252b6cf ("drm/i915/gvt: Add 2M huge gtt support")
> Cc: stable@vger.kernel.org
> Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com>
> ---
Applied, thanks!
> drivers/gpu/drm/i915/gvt/kvmgt.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c
> index a68addf..4a7cf86 100644
> --- a/drivers/gpu/drm/i915/gvt/kvmgt.c
> +++ b/drivers/gpu/drm/i915/gvt/kvmgt.c
> @@ -1911,6 +1911,18 @@ static int kvmgt_dma_map_guest_page(unsigned long handle, unsigned long gfn,
> ret = __gvt_cache_add(info->vgpu, gfn, *dma_addr, size);
> if (ret)
> goto err_unmap;
> + } else if (entry->size != size) {
> + /* the same gfn with different size: unmap and re-map */
> + gvt_dma_unmap_page(vgpu, gfn, entry->dma_addr, entry->size);
> + __gvt_cache_remove_entry(vgpu, entry);
> +
> + ret = gvt_dma_map_page(vgpu, gfn, dma_addr, size);
> + if (ret)
> + goto err_unlock;
> +
> + ret = __gvt_cache_add(info->vgpu, gfn, *dma_addr, size);
> + if (ret)
> + goto err_unmap;
> } else {
> kref_get(&entry->ref);
> *dma_addr = entry->dma_addr;
> --
> 1.8.3.1
>
> _______________________________________________
> intel-gvt-dev mailing list
> intel-gvt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev
--
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