From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BB12C3A5AA for ; Wed, 4 Sep 2019 18:15:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F241C206BA for ; Wed, 4 Sep 2019 18:15:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1567620957; bh=pNjTmQkXr2yxZMaQNAbVRnf1sMaLKyG6AAgQ8NtZhxI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=oDqx2MbxCu8fn+HNyg1mgiNWf4Won2wCNASecrLBzaA0dSDGW72hJLpuIoLJ9G0dS P/eTZ9L/5chuSgYYXk4vJHzyapxwwYz9/Kqzb0yBHqqWj94PFix3EgFsRSP6MbAdB5 BCrODlV3T7CfIp0wTiJ+jvP2ci0DGWx4333Wd1xg= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731584AbfIDSPP (ORCPT ); Wed, 4 Sep 2019 14:15:15 -0400 Received: from mail.kernel.org ([198.145.29.99]:60732 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389705AbfIDSPN (ORCPT ); Wed, 4 Sep 2019 14:15:13 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 98E9C22CF7; Wed, 4 Sep 2019 18:15:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1567620913; bh=pNjTmQkXr2yxZMaQNAbVRnf1sMaLKyG6AAgQ8NtZhxI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DEbUI2khU4cLrnO7xq9kbryVMeRRo+MoR1hw1VxT9+M/1PpdTe2qc3hdjA+hznfXJ 2HcI4qqUB8oPqg9AfuCh10V1VlC09SnrEU6A0b4oIzfTkKRzfYdBJCVA2s7SAbdGEr 7o18QigXo2y6UWiVw2nT4r/LqAFPsVmtpqtrBduA= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Ville Syrjala , Maarten Lankhorst , Jani Nikula , Manasi Navare , Sasha Levin Subject: [PATCH 5.2 140/143] drm/i915/dp: Fix DSC enable code to use cpu_transcoder instead of encoder->type Date: Wed, 4 Sep 2019 19:54:43 +0200 Message-Id: <20190904175319.933659265@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20190904175314.206239922@linuxfoundation.org> References: <20190904175314.206239922@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org [ Upstream commit d4c61c4a16decd8ace8660f22c81609a539fccba ] This patch fixes the intel_configure_pps_for_dsc_encoder() function to use cpu_transcoder instead of encoder->type to select the correct DSC registers that was wrongly used in the original patch for one DSC register isntance. Fixes: 7182414e2530 ("drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling") Cc: Ville Syrjala Cc: Maarten Lankhorst Cc: Jani Nikula Cc: Ville Syrjala Cc: # v5.0+ Signed-off-by: Manasi Navare Reviewed-by: Maarten Lankhorst Link: https://patchwork.freedesktop.org/patch/msgid/20190821215950.24223-1-manasi.d.navare@intel.com Signed-off-by: Sasha Levin --- drivers/gpu/drm/i915/intel_vdsc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_vdsc.c b/drivers/gpu/drm/i915/intel_vdsc.c index 3f9921ba4a769..eb978e7238c24 100644 --- a/drivers/gpu/drm/i915/intel_vdsc.c +++ b/drivers/gpu/drm/i915/intel_vdsc.c @@ -539,7 +539,7 @@ static void intel_configure_pps_for_dsc_encoder(struct intel_encoder *encoder, pps_val |= DSC_PIC_HEIGHT(vdsc_cfg->pic_height) | DSC_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances); DRM_INFO("PPS2 = 0x%08x\n", pps_val); - if (encoder->type == INTEL_OUTPUT_EDP) { + if (cpu_transcoder == TRANSCODER_EDP) { I915_WRITE(DSCA_PICTURE_PARAMETER_SET_2, pps_val); /* * If 2 VDSC instances are needed, configure PPS for second -- 2.20.1