From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D76EC2D0CE for ; Sun, 29 Dec 2019 18:09:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3F3A420748 for ; Sun, 29 Dec 2019 18:09:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1577642994; bh=+dygn76/IYAa2qso1+W1AAo3SPb0oDeGOQgT+IRdVls=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=S0MxK9ejXE9q+18FnnfBavSSDLySv20u6sFsMK0K49ZoxpNbm/sjOQ1mBd5oPVPS/ 3DKXSaRv+wnSACz4MmJ537fe1uQ9bSsqjDCHxDgTLhKeg1eS1XHznyDFUuoJrfDNNV iLrCXGI49kmxCvz0e4T0Wa5DJbOb570SrcWYnm6E= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729173AbfL2RpW (ORCPT ); Sun, 29 Dec 2019 12:45:22 -0500 Received: from mail.kernel.org ([198.145.29.99]:54362 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730547AbfL2RpV (ORCPT ); Sun, 29 Dec 2019 12:45:21 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id AF385206A4; Sun, 29 Dec 2019 17:45:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1577641521; bh=+dygn76/IYAa2qso1+W1AAo3SPb0oDeGOQgT+IRdVls=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jGmyPA4iOnlX7BDHSet/L+Eqix0d9RxuZNSMptYEr1cxXdbSCmkOK/9xkHfvhJrly WFS/JfGKUtGRt0JbAKzvDkqnWB9dfxFnoKCYlDUQQ3iZk9yB6DG4FPWzKdhzt2x3nH Cmo78PUO9gp4GAt3V3UMRdfXAqbSbaL8SyfiMqHU= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Neil Armstrong , Kevin Hilman , Sasha Levin Subject: [PATCH 5.4 063/434] drm/meson: vclk: use the correct G12A frac max value Date: Sun, 29 Dec 2019 18:21:56 +0100 Message-Id: <20191229172705.970433065@linuxfoundation.org> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20191229172702.393141737@linuxfoundation.org> References: <20191229172702.393141737@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Neil Armstrong [ Upstream commit d56276a13c2b9ea287b9fc7cc78bed4c43b286f9 ] When calculating the HDMI PLL settings for a DMT mode PHY frequency, use the correct max fractional PLL value for G12A VPU. With this fix, we can finally setup the 1024x768-60 mode. Fixes: 202b9808f8ed ("drm/meson: Add G12A Video Clock setup") Signed-off-by: Neil Armstrong Reviewed-by: Kevin Hilman Link: https://patchwork.freedesktop.org/patch/msgid/20190828132311.23881-1-narmstrong@baylibre.com Signed-off-by: Sasha Levin --- drivers/gpu/drm/meson/meson_vclk.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c index ac491a781952..f690793ae2d5 100644 --- a/drivers/gpu/drm/meson/meson_vclk.c +++ b/drivers/gpu/drm/meson/meson_vclk.c @@ -638,13 +638,18 @@ static bool meson_hdmi_pll_validate_params(struct meson_drm *priv, if (frac >= HDMI_FRAC_MAX_GXBB) return false; } else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) || - meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL) || - meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) { + meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL)) { /* Empiric supported min/max dividers */ if (m < 106 || m > 247) return false; if (frac >= HDMI_FRAC_MAX_GXL) return false; + } else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) { + /* Empiric supported min/max dividers */ + if (m < 106 || m > 247) + return false; + if (frac >= HDMI_FRAC_MAX_G12A) + return false; } return true; -- 2.20.1