From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AFADAC35247 for ; Mon, 3 Feb 2020 20:10:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7ED1620658 for ; Mon, 3 Feb 2020 20:10:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580760651; bh=iOvhO+hFgW/cYr15nBnXU0AFdbpgu7oZ1CIVrKriOns=; h=Date:From:To:Cc:Subject:References:In-Reply-To:List-ID:From; b=vexlMPEuRtSOP5USIdoOQtkUZqQOrUA3v7ESnfItxskF8fATdG27YxIfqArvuwfzo DEnDZdVoQjMVkByxUd0dO6QD9MN3tY3Q4fkIGRP8TqMQ8JC0lRMIHaSM9sIu3rgOvu /MOfRHxveX7FPmpuUMkU9om66b9uXQtHnT4T4cws= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726561AbgBCUKv (ORCPT ); Mon, 3 Feb 2020 15:10:51 -0500 Received: from mail-qv1-f67.google.com ([209.85.219.67]:37437 "EHLO mail-qv1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726187AbgBCUKu (ORCPT ); Mon, 3 Feb 2020 15:10:50 -0500 Received: by mail-qv1-f67.google.com with SMTP id m5so7457707qvv.4; Mon, 03 Feb 2020 12:10:50 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=nw70Z3f/pI3EKVI3TaFMheeJf5zaKvG6DNvjFq2WSWM=; b=VC3UQ5VMOHxfKXSd9cayojQq0/bM75ayfIIv+3aainbhZ+JPegksxNwWExxkxyK4Ju hTdI6mDcgJU56DJ5D2sR7QkdDLAruqQH2jSUenu1UZrMiprzGVQitJEZPy6soAsiQ9aI 7PjggS5OM0H5BT+cisrXTMoRxTJlOEQIEjhZjKVEZEd8mhO+cvxe1OyjcjA80AkoB/6F oQtxFMPk/ssQfM534c/eLCLFEroTLoBpNHhR/Tx7F4cFoAfqzvzSDYBhsQHp7tN50PcK +aGdPGAmpFtPuPP6xY7mO+Ow0GlLdhhXVha2bx5dXcvAKP7xnVdRyBWd2rzgkGP9Ucsd TBJg== X-Gm-Message-State: APjAAAXvxuClm9TfC2Tqwr5P7xav2sfjTJaExLK2bcd+QpaqeQMh0Q4+ rXEz9Ox/O1RCnCjyI1J7mlo= X-Google-Smtp-Source: APXvYqwfoBFGGWY2U0kn8JnKUDX54sgTNGsVambpWvo4p8xxClwziHcr9axnaFqDeHx7yqP3lC+R/A== X-Received: by 2002:a05:6214:209:: with SMTP id i9mr24402119qvt.54.1580760649781; Mon, 03 Feb 2020 12:10:49 -0800 (PST) Received: from 42.do-not-panic.com (42.do-not-panic.com. [157.230.128.187]) by smtp.gmail.com with ESMTPSA id c45sm10921693qtd.43.2020.02.03.12.10.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2020 12:10:48 -0800 (PST) Received: by 42.do-not-panic.com (Postfix, from userid 1000) id 3CC7F404B0; Mon, 3 Feb 2020 20:10:47 +0000 (UTC) Date: Mon, 3 Feb 2020 20:10:47 +0000 From: Luis Chamberlain To: Jari Ruusu Cc: Borislav Petkov , Fenghua Yu , Linus Torvalds , linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: Re: Fix built-in early-load Intel microcode alignment Message-ID: <20200203201047.GL11244@42.do-not-panic.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org On Sun, Jan 12, 2020 at 03:00:53PM +0200, Jari Ruusu wrote: > Intel Software Developer's Manual, volume 3, chapter 9.11.6 says: > "Note that the microcode update must be aligned on a 16-byte > boundary and the size of the microcode update must be 1-KByte > granular" > > When early-load Intel microcode is loaded from initramfs, > userspace tool 'iucode_tool' has already 16-byte aligned those > microcode bits in that initramfs image. Image that was created > something like this: > > iucode_tool --write-earlyfw=FOO.cpio microcode-files... > > However, when early-load Intel microcode is loaded from built-in > firmware BLOB using CONFIG_EXTRA_FIRMWARE= kernel config option, > that 16-byte alignment is not guaranteed. > > Fix this by forcing all built-in firmware BLOBs to 16-byte > alignment. > > > Signed-off-by: Jari Ruusu > > --- a/drivers/base/firmware_loader/builtin/Makefile > +++ b/drivers/base/firmware_loader/builtin/Makefile > @@ -17,7 +17,7 @@ > filechk_fwbin = \ > echo "/* Generated by $(src)/Makefile */" ;\ > echo " .section .rodata" ;\ > - echo " .p2align $(ASM_ALIGN)" ;\ > + echo " .p2align 4" ;\ Why not just keep ASM_ALIGN and define it to 4, with a nice comment explaining the ucode stuff. Now we have a raw 4 here and still use ASM_ALIGN which will depend on 64-bit or not. Luis > echo "_fw_$(FWSTR)_bin:" ;\ > echo " .incbin \"$(fwdir)/$(FWNAME)\"" ;\ > echo "_fw_end:" ;\ > > -- > Jari Ruusu 4096R/8132F189 12D6 4C3A DCDA 0AA4 27BD ACDF F073 3C80 8132 F189