From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20C52C35642 for ; Fri, 21 Feb 2020 08:47:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DE653206DB for ; Fri, 21 Feb 2020 08:47:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582274850; bh=Gq5rf7u/9z+VyLshbO6znJXsbmBI15OFp5FIdk80igY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=1WOUxDmgSJcndZpytjE+SIDsZO59z+/uzCHpMguF5/BaHkDul4iyqTeYJQstPprCZ LaHpgElKBLayV23cI59KiIPxt4BsQbFEIV6erRkAcCV61TzZ3JFj+wTRsZOwgevsVM D0aYMpPWmsw790tA0sWQfDY4rmcP1hCzUHud5WZE= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728594AbgBUHsm (ORCPT ); Fri, 21 Feb 2020 02:48:42 -0500 Received: from mail.kernel.org ([198.145.29.99]:44754 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729106AbgBUHsi (ORCPT ); Fri, 21 Feb 2020 02:48:38 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 435B82467A; Fri, 21 Feb 2020 07:48:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582271317; bh=Gq5rf7u/9z+VyLshbO6znJXsbmBI15OFp5FIdk80igY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Jea5k31pEPpo+75kGCet57DiKPnOoIqKbQlY/h8ixCgA4WkaV6UnY91+4T136zmCG emrKaPv8ev5ek1aTc8WIAcGqGOEFwGNLaUW0rVB0lgA9AbXDJa/daIy2CtazhwIqFP +SZDMFIAaXGFLjzXRWTHRrryw2H0hgpRJx6QdmAw= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Andre Przywara , Maxime Ripard , Sasha Levin Subject: [PATCH 5.5 121/399] arm: dts: allwinner: H3: Add PMU node Date: Fri, 21 Feb 2020 08:37:26 +0100 Message-Id: <20200221072414.236321563@linuxfoundation.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200221072402.315346745@linuxfoundation.org> References: <20200221072402.315346745@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Andre Przywara [ Upstream commit 0388a110747bec0c9d9de995842bb2a03a26aae1 ] Add the Performance Monitoring Unit (PMU) device tree node to the H3 .dtsi, which tells DT users which interrupts are triggered by PMU overflow events on each core. The numbers come from the manual and have been checked in U-Boot and with perf in Linux. Tested with perf record and taskset on an OrangePi Zero. Signed-off-by: Andre Przywara Signed-off-by: Maxime Ripard Signed-off-by: Sasha Levin --- arch/arm/boot/dts/sun8i-h3.dtsi | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index fe773c72a69b7..b4f1673df9ee0 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -80,7 +80,7 @@ #cooling-cells = <2>; }; - cpu@1 { + cpu1: cpu@1 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; @@ -90,7 +90,7 @@ #cooling-cells = <2>; }; - cpu@2 { + cpu2: cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; @@ -100,7 +100,7 @@ #cooling-cells = <2>; }; - cpu@3 { + cpu3: cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; @@ -111,6 +111,15 @@ }; }; + pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + timer { compatible = "arm,armv7-timer"; interrupts = , -- 2.20.1