From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E028C4724C for ; Mon, 4 May 2020 18:14:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0D7F52078C for ; Mon, 4 May 2020 18:14:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1588616065; bh=Dp1rLS8Oy9aebYRRZCDInVfYF7OYXthvspq2OHe+RgY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=vyzYfeNtjHMp1bXHLcO/H87azKfl/bB2vY8rD87DgBEAtnI8VgRVH0kPepTS9Bm9c 9TWADIUat4TaAPxrPtW0k6jFUNv3I+dyiYva4fWDnDL4y0s85GBV1c5eMUbpTT4Yll MMwCZxFXj1O2fIIr5O2N6rCosa9b7apkEQ1KyvfU= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731018AbgEDSAf (ORCPT ); Mon, 4 May 2020 14:00:35 -0400 Received: from mail.kernel.org ([198.145.29.99]:55402 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731011AbgEDSAe (ORCPT ); Mon, 4 May 2020 14:00:34 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 74C13206B8; Mon, 4 May 2020 18:00:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1588615233; bh=Dp1rLS8Oy9aebYRRZCDInVfYF7OYXthvspq2OHe+RgY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=xI6WsATGNM6cPZY0Ij+Ykc5dkt98CQGMBssa1OtqLBuV/QqP4Eln3bKqHYN3iwFyQ Lt62HY63b4/ShxvjZ8y9AHUgsKK9iHfHBrLZs1GokO+dRs1Z6y6d+zYSaw0fxQ0/8W cHmONVoW1mAtFwqGIdVuPD+I0rqFdMAo9qnA1fmc= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= , Manasi Navare Subject: [PATCH 4.14 02/26] drm/edid: Fix off-by-one in DispID DTD pixel clock Date: Mon, 4 May 2020 19:57:16 +0200 Message-Id: <20200504165442.980999284@linuxfoundation.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200504165442.494398840@linuxfoundation.org> References: <20200504165442.494398840@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Ville Syrjälä commit 6292b8efe32e6be408af364132f09572aed14382 upstream. The DispID DTD pixel clock is documented as: "00 00 00 h → FF FF FF h | Pixel clock ÷ 10,000 0.01 → 167,772.16 Mega Pixels per Sec" Which seems to imply that we to add one to the raw value. Reality seems to agree as there are tiled displays in the wild which currently show a 10kHz difference in the pixel clock between the tiles (one tile gets its mode from the base EDID, the other from the DispID block). Cc: stable@vger.kernel.org Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20200423151743.18767-1-ville.syrjala@linux.intel.com Reviewed-by: Manasi Navare Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/drm_edid.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -4502,7 +4502,7 @@ static struct drm_display_mode *drm_mode struct drm_display_mode *mode; unsigned pixel_clock = (timings->pixel_clock[0] | (timings->pixel_clock[1] << 8) | - (timings->pixel_clock[2] << 16)); + (timings->pixel_clock[2] << 16)) + 1; unsigned hactive = (timings->hactive[0] | timings->hactive[1] << 8) + 1; unsigned hblank = (timings->hblank[0] | timings->hblank[1] << 8) + 1; unsigned hsync = (timings->hsync[0] | (timings->hsync[1] & 0x7f) << 8) + 1;