From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 812E5C38A2A for ; Thu, 7 May 2020 14:34:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6230A2073A for ; Thu, 7 May 2020 14:34:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1588862041; bh=NEygi/XkXXH5h0c3mz86KPqt0SxdHMUDq3aHUMqj2T8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=iDeQ3Dg4c2eyMvB3jYRgT1EivcgQ843/iZ8ffWyB9bwyPPtYWRLar7h7/4IyUkRrB JXVZl04bbaMDcCZXVlanKxjkmm+ptg8qVJL2xtZvImRVRTwACVTkZzzQxY+YXFhdt1 NVXP6+jkMT1KeIRq+OtRL+G5euXH36Y11jLIenAk= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728819AbgEGOdz (ORCPT ); Thu, 7 May 2020 10:33:55 -0400 Received: from mail.kernel.org ([198.145.29.99]:57152 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728544AbgEGO31 (ORCPT ); Thu, 7 May 2020 10:29:27 -0400 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 08B3D2073A; Thu, 7 May 2020 14:29:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1588861766; bh=NEygi/XkXXH5h0c3mz86KPqt0SxdHMUDq3aHUMqj2T8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oGDtKRHrQME6ptzIQbnFgQBsK/f70wMmAJbXXpc4QzH5O29a8u14jjCOpe4PsK0vA M3ngVUNBvjwzFo5vHqug7XQG263oRo7dUELZ4qglTx0PanTUbtVfyUIo/bOqMuYcLO GBqZZ4uJOq8PD4d9L5nuojLM7ng8oC9P7j7lf4JE= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Aharon Landau , Maor Gottlieb , Leon Romanovsky , Jason Gunthorpe , Sasha Levin , linux-rdma@vger.kernel.org Subject: [PATCH AUTOSEL 4.19 07/20] RDMA/mlx5: Set GRH fields in query QP on RoCE Date: Thu, 7 May 2020 10:29:03 -0400 Message-Id: <20200507142917.26612-7-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200507142917.26612-1-sashal@kernel.org> References: <20200507142917.26612-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Aharon Landau [ Upstream commit 2d7e3ff7b6f2c614eb21d0dc348957a47eaffb57 ] GRH fields such as sgid_index, hop limit, et. are set in the QP context when QP is created/modified. Currently, when query QP is performed, we fill the GRH fields only if the GRH bit is set in the QP context, but this bit is not set for RoCE. Adjust the check so we will set all relevant data for the RoCE too. Since this data is returned to userspace, the below is an ABI regression. Fixes: d8966fcd4c25 ("IB/core: Use rdma_ah_attr accessor functions") Link: https://lore.kernel.org/r/20200413132028.930109-1-leon@kernel.org Signed-off-by: Aharon Landau Reviewed-by: Maor Gottlieb Signed-off-by: Leon Romanovsky Signed-off-by: Jason Gunthorpe Signed-off-by: Sasha Levin --- drivers/infiniband/hw/mlx5/qp.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c index 4fc9278d0ddec..10f6ae4f8f3ff 100644 --- a/drivers/infiniband/hw/mlx5/qp.c +++ b/drivers/infiniband/hw/mlx5/qp.c @@ -4887,7 +4887,9 @@ static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f); rdma_ah_set_static_rate(ah_attr, path->static_rate ? path->static_rate - 5 : 0); - if (path->grh_mlid & (1 << 7)) { + + if (path->grh_mlid & (1 << 7) || + ah_attr->type == RDMA_AH_ATTR_TYPE_ROCE) { u32 tc_fl = be32_to_cpu(path->tclass_flowlabel); rdma_ah_set_grh(ah_attr, NULL, -- 2.20.1