From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3AB94C38A2A for ; Fri, 8 May 2020 12:44:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 11A7F208D6 for ; Fri, 8 May 2020 12:44:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1588941877; bh=HJHN5sj1vd4/4NzFiddp91u6CB25GJ+psBJotnAwsvg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=Knb3NlRQ42vbyEqPTxcTuKzHMUeo7WpqZa+EmyyyU0TNvq22IU5jeMFm/mtGrjK+p 05AVs3A78kjRhij01YJ4tXCIebu+Y6BFssj3is6FmZLONK5wqb9MPl+hpcftlo6e4s mBV1kG9nAzss73tOT+DJ1oav6yRCLc57safYwOSs= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729205AbgEHMog (ORCPT ); Fri, 8 May 2020 08:44:36 -0400 Received: from mail.kernel.org ([198.145.29.99]:43116 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729202AbgEHMof (ORCPT ); Fri, 8 May 2020 08:44:35 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id AF6B02145D; Fri, 8 May 2020 12:44:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1588941875; bh=HJHN5sj1vd4/4NzFiddp91u6CB25GJ+psBJotnAwsvg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=08OohzFhl39jOtzsNFPH5hpBmQybK8TwW2eUiK47VWIOv2ybTgS/FChTIM+smv0uX zKrn+V1EKRDPHlN++1dbg+RAeCIby8dD9vyDZUxpvXUtvRTdTzsMjUS0f0kVqBiy/2 vAtOgftoPkohlWUBhg3xY2qwo5Ga2ocEzPzus4SU= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Laura Abbott , Loc Ho , Stephen Boyd Subject: [PATCH 4.4 207/312] clk: xgene: Dont call __pa on ioremaped address Date: Fri, 8 May 2020 14:33:18 +0200 Message-Id: <20200508123138.976378561@linuxfoundation.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200508123124.574959822@linuxfoundation.org> References: <20200508123124.574959822@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Laura Abbott commit 06b113e9f28f8657715919087a3f54b77d1634ed upstream. ioremaped addresses are not linearly mapped so the physical address can not be figured out via __pa. More generally, there is no guarantee that backing value of an ioremapped address is a physical address at all. The value here is only used for debugging so just drop the call to __pa on the ioremapped address. Fixes: 6ae5fd381251 ("clk: xgene: Silence sparse warnings") Signed-off-by: Laura Abbott Acked-by: Loc Ho Signed-off-by: Stephen Boyd Signed-off-by: Greg Kroah-Hartman --- drivers/clk/clk-xgene.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) --- a/drivers/clk/clk-xgene.c +++ b/drivers/clk/clk-xgene.c @@ -218,22 +218,20 @@ static int xgene_clk_enable(struct clk_h struct xgene_clk *pclk = to_xgene_clk(hw); unsigned long flags = 0; u32 data; - phys_addr_t reg; if (pclk->lock) spin_lock_irqsave(pclk->lock, flags); if (pclk->param.csr_reg != NULL) { pr_debug("%s clock enabled\n", clk_hw_get_name(hw)); - reg = __pa(pclk->param.csr_reg); /* First enable the clock */ data = xgene_clk_read(pclk->param.csr_reg + pclk->param.reg_clk_offset); data |= pclk->param.reg_clk_mask; xgene_clk_write(data, pclk->param.csr_reg + pclk->param.reg_clk_offset); - pr_debug("%s clock PADDR base %pa clk offset 0x%08X mask 0x%08X value 0x%08X\n", - clk_hw_get_name(hw), ®, + pr_debug("%s clk offset 0x%08X mask 0x%08X value 0x%08X\n", + clk_hw_get_name(hw), pclk->param.reg_clk_offset, pclk->param.reg_clk_mask, data); @@ -243,8 +241,8 @@ static int xgene_clk_enable(struct clk_h data &= ~pclk->param.reg_csr_mask; xgene_clk_write(data, pclk->param.csr_reg + pclk->param.reg_csr_offset); - pr_debug("%s CSR RESET PADDR base %pa csr offset 0x%08X mask 0x%08X value 0x%08X\n", - clk_hw_get_name(hw), ®, + pr_debug("%s csr offset 0x%08X mask 0x%08X value 0x%08X\n", + clk_hw_get_name(hw), pclk->param.reg_csr_offset, pclk->param.reg_csr_mask, data); }