From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3ECD0C433E1 for ; Tue, 23 Jun 2020 21:39:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0BC682072E for ; Tue, 23 Jun 2020 21:39:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592948392; bh=OCemDDGdOGHaCZXLKIZ8zQOVAJWfK5uDwvW0wZKu5ow=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=f4O+lhxEMlJBYzWj9I/0ie2+MpoJKVsPO7+InmISjvwC2R1ZJO7Ks2ndUthb2LFU5 7A9WQCbggSIDSBxAA7PsgcZ5XvD7VX4ocq8nddr5rCYOWbAp59hOENMlkMAr19KiL6 kC+gCVA9T12a8w/WsCKrF/TvLt7hkxhVdPoKEe9g= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388554AbgFWUHA (ORCPT ); Tue, 23 Jun 2020 16:07:00 -0400 Received: from mail.kernel.org ([198.145.29.99]:47316 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388553AbgFWUG7 (ORCPT ); Tue, 23 Jun 2020 16:06:59 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 84E8E2078A; Tue, 23 Jun 2020 20:06:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592942819; bh=OCemDDGdOGHaCZXLKIZ8zQOVAJWfK5uDwvW0wZKu5ow=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qW/z862GqBPm8LgGv8ED62hn1aKACnDiKm7xp/mSGKZL5vxtA42nBOtxW2u9tp0/6 2MNXQ0Gkcgbp/iXGCKcOaq5mw6kfatCUbrAxppM7y0219rS96GMhsTDYto2S8JYGcp 6xaj1D36wOisw8Kjzu4/ZstlWEe+7KDKt0h8mhRg= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Neil Armstrong , Martin Blumenstingl , Jerome Brunet , Sasha Levin Subject: [PATCH 5.7 148/477] clk: meson: meson8b: Fix the first parent of vid_pll_in_sel Date: Tue, 23 Jun 2020 21:52:25 +0200 Message-Id: <20200623195414.596419713@linuxfoundation.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200623195407.572062007@linuxfoundation.org> References: <20200623195407.572062007@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Martin Blumenstingl [ Upstream commit da1978ac3d6cf278dedf5edbf350445a0fff2f08 ] Use hdmi_pll_lvds_out as parent of the vid_pll_in_sel clock. It's not easy to see that the vendor kernel does the same, but it actually does. meson_clk_pll_ops in mainline still cannot fully recalculate all rates from the HDMI PLL registers because some register bits (at the time of writing it's unknown which bits are used for this) double the HDMI PLL output rate (compared to simply considering M, N and FRAC) for some (but not all) PLL settings. Update the vid_pll_in_sel parent so our clock calculation works for simple clock settings like the CVBS output (where no rate doubling is going on). The PLL ops need to be fixed later on for more complex clock settings (all HDMI rates). Fixes: 6cb57c678bb70 ("clk: meson: meson8b: add the read-only video clock trees") Suggested-by: Neil Armstrong Signed-off-by: Martin Blumenstingl Signed-off-by: Jerome Brunet Link: https://lore.kernel.org/r/20200417184127.1319871-2-martin.blumenstingl@googlemail.com Signed-off-by: Sasha Levin --- drivers/clk/meson/meson8b.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c index 34a70c4b48991..ac4a883acd2ac 100644 --- a/drivers/clk/meson/meson8b.c +++ b/drivers/clk/meson/meson8b.c @@ -1077,7 +1077,7 @@ static struct clk_regmap meson8b_vid_pll_in_sel = { * Meson8m2: vid2_pll */ .parent_hws = (const struct clk_hw *[]) { - &meson8b_hdmi_pll_dco.hw + &meson8b_hdmi_pll_lvds_out.hw }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT, -- 2.25.1