From: Sasha Levin <sashal@kernel.org>
To: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org, kernel-team@android.com
Subject: Re: [PATCH][STABLE 4.9] irqchip/gic: Atomically update affinity
Date: Thu, 9 Jul 2020 10:30:34 -0400 [thread overview]
Message-ID: <20200709143034.GZ2722994@sasha-vm> (raw)
In-Reply-To: <20200707153741.1935141-1-maz@kernel.org>
On Tue, Jul 07, 2020 at 04:37:41PM +0100, Marc Zyngier wrote:
>Commit 005c34ae4b44f085120d7f371121ec7ded677761 upstream.
>
>The GIC driver uses a RMW sequence to update the affinity, and
>relies on the gic_lock_irqsave/gic_unlock_irqrestore sequences
>to update it atomically.
>
>But these sequences only expand into anything meaningful if
>the BL_SWITCHER option is selected, which almost never happens.
>
>It also turns out that using a RMW and locks is just as silly,
>as the GIC distributor supports byte accesses for the GICD_TARGETRn
>registers, which when used make the update atomic by definition.
>
>Drop the terminally broken code and replace it by a byte write.
>
>Fixes: 04c8b0f82c7d ("irqchip/gic: Make locking a BL_SWITCHER only feature")
>Cc: stable@vger.kernel.org
>Signed-off-by: Marc Zyngier <maz@kernel.org>
Queued for 4.9, thanks!
--
Thanks,
Sasha
next prev parent reply other threads:[~2020-07-09 14:30 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-07 15:37 [PATCH][STABLE 4.9] irqchip/gic: Atomically update affinity Marc Zyngier
2020-07-09 14:30 ` Sasha Levin [this message]
2020-07-20 12:27 ` Greg KH
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