From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07AA2C388F7 for ; Sat, 31 Oct 2020 11:47:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C758120691 for ; Sat, 31 Oct 2020 11:47:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1604144845; bh=rR9Jkf50UQUAjHa+cVXaYgU+m5D2ACXE+ASeeNmOUfk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=j2UkZReTv0PjGTIl3V4hOTDIVK4c57tEVyOE7qxIonvYuaSvqgPPeYhx+a+mx3TQ2 yWYEaDuJMTpCFGjpAeLUVGUTAgxZLXDqSrpco/jOFmvibgUjQVIbKaBs4STVneBWmy 4zG0daDHUcQUgN18eci21YGXarwRlKCpQesHHm5A= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728276AbgJaLph (ORCPT ); Sat, 31 Oct 2020 07:45:37 -0400 Received: from mail.kernel.org ([198.145.29.99]:46590 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727740AbgJaLpe (ORCPT ); Sat, 31 Oct 2020 07:45:34 -0400 Received: from localhost (83-86-74-64.cable.dynamic.v4.ziggo.nl [83.86.74.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 50EA2205F4; Sat, 31 Oct 2020 11:45:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1604144733; bh=rR9Jkf50UQUAjHa+cVXaYgU+m5D2ACXE+ASeeNmOUfk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ev2cUF+ifOH1sLDHsLzF0OuNFcmLiMiAWltQ0LKtBPTbRFNBBh64vNIn9Oa5xxzsX JP/u34J4u2b/hn0LqxlmnED3vXVLExj10NDVNcvPzQp48BJbK979rn5zCQ2kkAE+gK xK85wpy3rswmsiTKsN35TL6Wd9UWrFhcnQxXG8e8= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Suzuki K Poulose , Marc Zyngier , Will Deacon Subject: [PATCH 5.9 20/74] arm64: Run ARCH_WORKAROUND_1 enabling code on all CPUs Date: Sat, 31 Oct 2020 12:36:02 +0100 Message-Id: <20201031113501.025162343@linuxfoundation.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201031113500.031279088@linuxfoundation.org> References: <20201031113500.031279088@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Marc Zyngier commit 18fce56134c987e5b4eceddafdbe4b00c07e2ae1 upstream. Commit 73f381660959 ("arm64: Advertise mitigation of Spectre-v2, or lack thereof") changed the way we deal with ARCH_WORKAROUND_1, by moving most of the enabling code to the .matches() callback. This has the unfortunate effect that the workaround gets only enabled on the first affected CPU, and no other. In order to address this, forcefully call the .matches() callback from a .cpu_enable() callback, which brings us back to the original behaviour. Fixes: 73f381660959 ("arm64: Advertise mitigation of Spectre-v2, or lack thereof") Cc: Reviewed-by: Suzuki K Poulose Signed-off-by: Marc Zyngier Signed-off-by: Will Deacon Signed-off-by: Greg Kroah-Hartman --- arch/arm64/kernel/cpu_errata.c | 8 ++++++++ 1 file changed, 8 insertions(+) --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -599,6 +599,12 @@ check_branch_predictor(const struct arm6 return (need_wa > 0); } +static void +cpu_enable_branch_predictor_hardening(const struct arm64_cpu_capabilities *cap) +{ + cap->matches(cap, SCOPE_LOCAL_CPU); +} + static const __maybe_unused struct midr_range tx2_family_cpus[] = { MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN), MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2), @@ -890,9 +896,11 @@ const struct arm64_cpu_capabilities arm6 }, #endif { + .desc = "Branch predictor hardening", .capability = ARM64_HARDEN_BRANCH_PREDICTOR, .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, .matches = check_branch_predictor, + .cpu_enable = cpu_enable_branch_predictor_hardening, }, #ifdef CONFIG_RANDOMIZE_BASE {