From: Mathias Nyman <mathias.nyman@linux.intel.com>
To: <gregkh@linuxfoundation.org>
Cc: <linux-usb@vger.kernel.org>,
Abhijeet Rao <abhijeet.rao@intel.com>,
stable@vger.kernel.org,
"Nikunj A . Dadhania" <nikunj.dadhania@intel.com>,
Azhar Shaikh <azhar.shaikh@intel.com>,
Mathias Nyman <mathias.nyman@linux.intel.com>
Subject: [PATCH 1/5] xhci-pci: Allow host runtime PM as default for Intel Alder Lake xHCI
Date: Wed, 12 May 2021 11:08:12 +0300 [thread overview]
Message-ID: <20210512080816.866037-2-mathias.nyman@linux.intel.com> (raw)
In-Reply-To: <20210512080816.866037-1-mathias.nyman@linux.intel.com>
From: Abhijeet Rao <abhijeet.rao@intel.com>
In the same way as Intel Tiger Lake TCSS (Type-C Subsystem) the Alder Lake
TCSS xHCI needs to be runtime suspended whenever possible to allow the
TCSS hardware block to enter D3cold and thus save energy.
Cc: stable@vger.kernel.org
Signed-off-by: Abhijeet Rao <abhijeet.rao@intel.com>
Signed-off-by: Nikunj A. Dadhania <nikunj.dadhania@intel.com>
Signed-off-by: Azhar Shaikh <azhar.shaikh@intel.com>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
---
drivers/usb/host/xhci-pci.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 5bbccc9a0179..a858add8436c 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -57,6 +57,7 @@
#define PCI_DEVICE_ID_INTEL_CML_XHCI 0xa3af
#define PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI 0x9a13
#define PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI 0x1138
+#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI 0x461e
#define PCI_DEVICE_ID_AMD_PROMONTORYA_4 0x43b9
#define PCI_DEVICE_ID_AMD_PROMONTORYA_3 0x43ba
@@ -243,7 +244,8 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI ||
pdev->device == PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI ||
pdev->device == PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI ||
- pdev->device == PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI))
+ pdev->device == PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI ||
+ pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI))
xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW;
if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
--
2.25.1
next parent reply other threads:[~2021-05-12 8:06 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20210512080816.866037-1-mathias.nyman@linux.intel.com>
2021-05-12 8:08 ` Mathias Nyman [this message]
2021-05-12 8:08 ` [PATCH 2/5] xhci: Fix giving back cancelled URBs even if halted endpoint can't reset Mathias Nyman
2021-05-12 8:08 ` [PATCH 3/5] xhci: Do not use GFP_KERNEL in (potentially) atomic context Mathias Nyman
2021-05-12 8:08 ` [PATCH 4/5] usb: xhci: Increase timeout for HC halt Mathias Nyman
2021-05-12 8:08 ` [PATCH 5/5] xhci: Add reset resume quirk for AMD xhci controller Mathias Nyman
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